A method of decoding a video signal is disclosed. The present invention includes obtaining identification information indicating whether a coded picture of a current NAL unit is an inter-view picture group, obtaining interview reference information of the inter-view picture group, and constructing a reference picture list for inter-view prediction using the inter-view reference information according to the identification information, wherein the inter-view reference information includes view identification information of an inter-view reference picture.

Method and apparatus for decoding/encoding a video signal

Prediction-based compression engines are spoon-fed with sequentially efficiently compressible (SEC) streams of input data that make it possible for the compression engines to more efficiently compress or otherwise compact the incoming data than would be possible with streams of input data accepted on a TV-raster scan basis. Various techniques are disclosed for intentionally forming SEC input data streams. Among these are the tight packing of alike files or fragments into concatenation suitcases and the decomposition of files into substantially predictably consistent (SPC) fragments or segments that are routed to different suitcases according to their type. In a graphics-directed embodiment, image frames are partitioned into segment areas that are internally SPC and multidirectional walks (i.e., U-turning walks) are defined in the segment areas where these defined walks are traced during compression and also during decompression. A variety of pre-compression data transformation methods are disclosed for causing apparently random data sequences to appear more compressibly alike to each other. The methods are usable in systems that permit substantially longer times for data compaction operations than for data decompaction operations.

Methods and apparatus for reducing storage size

A pipeline video decoder and decompression system handles a plurality of separately encoded bit streams arranged as a single serial bit stream of digital bits and having separately encoded pairs of control codes and corresponding data carried in the serial bit stream. The pipeline system employs a plurality of interconnected stages to decode and decompress the single bit stream, including a start code detector. When in a search mode, the start code detector searches for a specific start code corresponding to one of multiple compression standards. The start code detector responding to the single serial bit stream generates control tokens and data tokens. A respective one of the tokens includes a plurality of data words. Each data word has an extension bit which indicates a presence of additional words therein. The data words are thereby unlimited in number. A token decode circuit positioned in certain of the stages recognizes certain of the tokens as control tokens pertinent to that stage and passes unrecognized control tokens to a succeeding stage. A reconfigurable decode and parser processing means positioned in certain of the stages is responsive to a recognized control token and reconfigures a particular stage to handle an identified data token. Methods relating to the decoder and decompression system include processing steps relating thereto.

Multistandard video decoder and decompression system for processing encoded bit streams including a video formatter and methods relating thereto

A receiver for receiving block coded HDTV compressed digital video signals decimates the data in each block to produce NTSC resolution images but with a significant savings in receiver hardware

Lower resolution hdtv receivers

A CMOS integrated signal processing system for a sampling receiver includes a timing recovery circuit, wherein an on-chip numerically controlled oscillator is operative at periods T that are initially equal to the nominal baud rate of the signals controls a sinc interpolator receiving samples at the sampling rate. A loop filter is coupled to the sinc interpolator and to the numerically controlled oscillator. The arrangement is capable of handling various symbol rates. The system includes a circuit for carrier recovery, having a second on-chip numerically controlled oscillator, a digital derotation circuit responsive to the second numerically controlled oscillator, accepting an in phase component and a quadrature component of the sampled signals. An adaptive phase error estimation circuit is coupled in a feedback loop.

Signal processing system

Apparatus for encoding/decoding an HDTV signal for e.g., terrestrial transmission includes a compression circuit (10) responsive to high definition video source signals for providing hierarchically layered codewords CW representing compressed video data and associated codewords T, defining the types of data represented by the codewords CW. A priority selection circuit (11), responsive to the codewords CW and T, parses the codewords CW into high and low priority codeword sequences wherein the high and low priority codeword sequences correspond to compressed video data of relatively greater and lesser importance to image reproduction respectively. A transport processor (12), responsive to the high and low priority codeword sequences, forms high and low priority transport blocks of high and low priority codewords respectively. Each transport block includes a header, codewords CW and error detection check bits. The respective transport blocks are applied to a forward error check circuit (15, 16) for applying additional error check data. Thereafter the high and low priority data are applied to a modem (17) wherein they quadrature amplitude modulate respective carriers for transmission.

An hdtv compression system

FIELD: high-definition TV systems. SUBSTANCE: device has compression circuit which outputs code words CW and code words T according to signals of high-definition video signals. Code words CW are arranged in hierarchy and represent compressed video data. Code words T define data types represented by code words CW. Priority selection circuit responds to code words CW, T, splits code words CW into sequences of high-priority and low-priority code words which correspond to compressed video data of larger or lesser significance with respect to image displaying. Goal of invention is achieved by transmission processor which responds to sequences of code words of high or low priority, generates code words transmission units of respectively high or low priority. Each transmission unit has header, code words C and control bits for error detection. Corresponding transmission units are sent to direct error checking circuit, which generates additional data about error check. Then high and low priority data are sent to modem in which they are used for amplitude quadrature modulation of carrier for data transmission. EFFECT: possibility to define and transmit high and low priority data. 12 cl, 13 dwg

Device for encoding of video signal which represents images, tv set for receiving signal with headers and image data represented as compressed video data

Wine Charles Martin

Papers

An hdtv compression system

Device for encoding of video signal which represents images, tv set for receiving signal with headers and image data represented as compressed video data