In a computer aided design (CAD) apparatus, an association-data acquiring unit acquires association data that defines an association between pins of a first connector and those of a second connector to be connected to the first connector, and an assignment of signals to the pins. A part-information acquiring unit acquires information including a symbol of the first connector. A layout-condition acquiring unit acquires a layout condition to lay out the symbol of the first connector on a circuit diagram. A circuit diagram creating/updating unit lays out the symbol of the first connector on the circuit diagram based on the layout condition, and adds a net name indicating a signal assigned to each of the pins to the symbol.

CAD apparatus and check support apparatus

CAD apparatus, method, and computer product for designing printed circuit board

A device is provided with a unit that stores shape and state characteristics of connectors, their electric characteristics, a judging equation to judge whether their connections are good or not, and information defined in script; and a unit that stores information defined in script of transfer functions to transfer the electric characteristics and the judging equation along a cable, wherein the connection consistency of the cable to connect connectors of the components is checked by analyzing characteristics of each connector, and scripts of the judging equation and the transfer functions; and a suitable cable candidate is selected and a processing is achieved by making use of scripts and an algorism unified for connectors and cables with various characters.

Connection consistency check processing method, cable selection processing method, design confirmation processing device and recording medium that records design confirmation processing program

PROBLEM TO BE SOLVED: To efficiently verify that a signal is correctly assigned to a connector pin even if the same pin name is not assigned to a corresponding connector pin. SOLUTION: An association check support apparatus 301 includes a design-data acquiring unit 341 for acquiring design data including pin information that indicates association between a pin name and a net name of each pin of a connector; a connector-information display unit 342 for displaying, on a display unit 310, first connector information and second connector information included in the design data obtained by the design-data acquiring unit 341; and a pin-information sorting unit 343 for sorting, in a predetermined order, the first pin information and the second pin information displayed by the connector information display unit 342. COPYRIGHT: (C)2008,JPO&INPIT

Association check support apparatus and association check support program

A determination unit determines a precondition indicating an expected state of a system that is to execute processing corresponding to an operation, and a postcondition indicating an expected state of the system that has executed the processing corresponding to the operation, based on a work log of previously-performed work. An association unit associates each of a plurality of operations with an operation whose precondition matches a postcondition of the each of the plurality of operations. A search unit searches for a path that starts from an operation whose precondition matches an initial condition satisfied by an operation object system, traces an associated operation, and reaches an operation whose postcondition matches a target condition indicating a target state of the operation object system after work. A generation unit generates an operation procedure in which operations on the path found by the search are arranged in order.

Operation search method and operation search apparatus

PROBLEM TO BE SOLVED: To provide a method and a system for verifying card designs contributing to enhancement of the quality of card designs by verifying the card designs in the same manner as verifying connections within a card. SOLUTION: A card connection relationship map creating means creates card connection relationship map information at the input of card net list information and inter-card connection information, and stores only the connector parts of the connection relationship between card net lists, without storing connections within the card net lists. An in-card verification means extracts the parts of the card net list information and component information which correspond to inter-card connections, and stores them as inter-card connection part information, while at the same time verifying the inside of the card. A inter-card connection information creating means creates inter-card connection net list information from the card net list information, the card connection relationship map information, and the inter-card connection part information. A inter-card verification means verifies inter-card connections based on the component information and the inter-card connection net list information. COPYRIGHT: (C)2005,JPO&NCIPI

Method and system for verifying card design

PROBLEM TO BE SOLVED: To efficiently verify the execution environment validity, consistency and continuous executability of a batch file. SOLUTION: A batch processing verification apparatus for verifying the processing conditions of a batch file which has defined the execution order of one or two or more program execution units is provided with: an input information storing means 10 for storing environment information defining the execution environment information of a program and input file information defining the name of an input file; a necessary environment information/input file confirming means 21 for confirming whether or not the information of the execution environment necessary for the execution of the program execution unit exists in the environment information, and for confirming whether or not the name of an input file necessary for the execution of the program execution unit exists in the input file information; an execution/pseudo-execution switching means 22 for switching the execution and pseudo-execution of the program execution unit, a program executing means 23 for executing the program execution unit, and for generating an output file by using the input file; and a program pseudo-execution means 24 for generating an output file without executing the program execution unit. COPYRIGHT: (C)2006,JPO&NCIPI

Batch processing verification apparatus, batch processing verification program and batch processing verification method

PROBLEM TO BE SOLVED: To provide a system for highly precisely verifying the circuit design of a semiconductor device in which an LSI is mounted on a wiring substrate by a short TAT. SOLUTION: A logical information developing means 21 extracts a common signal terminal from a PKG netlist 11, and replaces the physical information of a resistance, a capacity and a switch to be connected to the common signal terminal with electric characteristic information by referring to a resistance/capacity library 12. A netlist/rule matching verification means 22 judges whether or not the electric characteristic information of each extracted common signal terminal satisfies a constraint rule described in an LSI rule file 13, and replaces it with logical and circuit verification. A logic/electric SIM execution means 24 performs logical verification and electric verification about an unverified netlist 33 acquired by excluding the connection section of the common signal terminal whose verification has been ended from the netlist. COPYRIGHT: (C)2009,JPO&INPIT

雅仁熊崎

Papers

Method and system for verifying card design

Batch processing verification apparatus, batch processing verification program and batch processing verification method

Circuit design verification system, method, and program

雅仁 熊崎

Papers

Method and system for verifying card design

Batch processing verification apparatus, batch processing verification program and batch processing verification method

Circuit design verification system, method, and program

雅仁熊崎