PROBLEM TO BE SOLVED: To solve the problem of delaying a signal line and limiting system performance by acquiring debugging data generated under the control of a coprocessor in response to a simultaneously executed coprocessor instruction by a main processor in a debugging mode. SOLUTION: In the debugging mode, different instructions are sent to the main processor and the coprocessor and the main processor acquires the debugging data generated under the control of the coprocessor in response to the simultaneously executed coprocessor instruction. Relating to this device, a main processor pipeline 16 responds to main processor instructions read from an instruction bus 18 and sends them to an instruction execution device 12 in order to execute them. A main processor instruction scanning chain 20 is provided in an instruction line and the instructions are inserted to an instruction pipeline 16 when debugging is operated. An output scanning chain is provided in a data line and a data value read from a register bank 14 is acquired on a data bus 24 when the debugging is operated.

Debugging data processor

PURPOSE: To provide a structure and method for generating a forcing-in instruction to a CPU core by using a microprocessor provided with an on-chip cache memory. CONSTITUTION: A CPU core 103 has two co-processors controlled by a master pipeline control unit 103c, an integer CPU, and a system control co-processor 103b. The integer CPU executes an instruction set known as the instruction set architecture. The co-porcessor 103b has a translation look-aside buffer (TLB) 103b-3 and provides the mapping between a virtual address and a physical address. The cache system of a microprocessor has two cache memories, an instruction cache memory 102a, and a data cache memory 102b. The TLB unit 103b-3 receives a virtual address on a bus 109 and supplies a physical address which responds to either one of the cache memories 102a and 102b to a bus 107.

Yashiyayafu Mooru

Papers

Structure and method for monitoring of on-chip cache of microprocessor