A sensor system (1000) comprises a tag (100). The tag comprises at least one radio-frequency chip (130) having a memory element, an antenna (140) disposed in electrical communication with output terminals of the chip and a non-conductive coating (115) disposed upon a surface of the tag. The non-conductive coating covers the chip and defines a perimeter. The perimeter is disposed over and exposes the antenna.

Radio frequency identification tag

Embodiments of the technology provide an articulable electrosurgical instrument and methods of performing electrosurgery with an articulating capability. The electrosurgical instrument includes an elongated shaft having an end effector associated with a distal end thereof that is able to deliver energy to a target tissue site. An articulable joint is positioned between that shaft and the end effector. Articulation of the articulable joint is controlled by a stabilizable articulation actuator, which may include a rotatably stabilizable disk residing within a well. The end effector may take the form of forceps including an upper and a lower jaw; the jaws are configured to grasp target tissue and to deliver energy, such as radiofrequency energy. In some of these instruments, the end effector is adapted to seal tissue by the application of radiofrequency energy, and then to cut through the sealed tissue portion.

Articulable electrosurgical instrument with a stabilizable articulation actuator

An electrode structure and a mechanism for automated or user-selected operation or compensation of the electrodes, for example to determine tissue coverage and/or prevent arcing between bottom electrodes during electrocautery is disclosed.

Electrocautery method and apparatus

A logic signal isolator comprising a transformer having a primary winding and a secondary winding; a transmitter circuit which drives said primary winding in response to a received logic signal, such that in response to a first type of edge in the logic signal, a signal of a first predetermined type is supplied to the primary winding and in response to a second type of edge in the logic signal, a signal of a second predetermined type is supplied to said primary winding, the primary winding and the transmitter being referenced to a first ground; and the secondary winding being referenced to a second ground which is galvanically isolated from the first ground and said secondary winding supplying to a receiver circuit signals received in correspondence to the signals provided to the primary winding, the receiver reconstructing the received logic signal from the received signals.

Signal isolators using micro-transformers

A three-dimensional inductor coil is fabricated on top of a semiconductor substrate. The fabrication process includes the steps of depositing a first photoresist layer (406), forming a trench therein, and filling the trench with electroplated metal (404). A second photoresist layer (408) is deposited, and first and second trenches (410) are formed therein and filled with electroplated metal (412). A third photoresist layer (416) is deposited and a trench (418) formed therein, and then filled with electroplated metal (420). The first, second, and third photoresist layers (406, 408, 416) are then removed to expose a multi-loop inductor coil (500, 550).

Method of forming a three-dimensional integrated inductor

Inductive structures having low parasitic capacitances for direct integration in semiconductor integrated circuits. In one embodiment, a generally planar spiral winding is disposed on the surface of a substrate. An electrical connection to the internal end of the spiral is made through electrically conducting vias passing through the substrate. The spiral may be spaced from a substrate surface by a plurality of spaced apart electrically conductive posts having a staggered arrangement between adjacent windings of the spiral. A transformer includes two windings disposed on top of each other on a semiconductor substrate and separated by an electrically insulating film. The windings have a common central opening in which a magnetic material is disposed to improve the inductive coupling between the windings. The transformer may include two helical windings, one surrounding another, each formed with vias and electrical conductors, the inner winding being formed in and on a semiconductor substrate and the outer winding being formed on insulating films disposed on the substrate and extending through the films and substrate. A variable inductor includes inductively coupled spiral windings separated by an insulating film and a current control for controlling the current through one of the spirals and, thereby, the effective inductance of the other spiral.

Inductive structures for semiconductor integrated circuits

An integrated circuit device includes a substrate; circuit elements including an active element and a bias line for applying a DC bias voltage to the active element, disposed on the substrate; a thermoplastic material layer disposed on a region of the substrate; and a magnetic substance layer disposed on a region of the substrate including a region of the bias line, and adhered to and supported by the thermoplastic material layer. In this structure, the magnetic substance layer can be formed in an appropriate shape and at an appropriate position on the bias line according to the oscillation characteristics of the active element, such as a transistor, and the magnetic substance layer absorbs the frequency components of the oscillation of the active element, whereby oscillation of the active element is easily prevented. Further, since the magnetic substance layer is disposed on the bias line, unwanted increase in the chip area of the integrated circuit device due to the use of the prior art oscillation preventing circuit is avoided.

Integrated circuit device

An apparatus of testing a semiconductor element applies pulsed voltages synchronized with each other, respectively, to a gate and a drain of a semiconductor element being tested and measures current flowing through the semiconductor element in response to the pulsed voltages thus applied. The testing apparatus produces pulsed I-V characteristics considering the influences of self heating and surface energy levels of the semiconductor element and RF swing along a load line during large signal operation.

Method for testing semiconductor element

A surface inspection apparatus includes: a light source unit that emits a divergent light flux of predetermined linearly polarized light to be used to illuminate a test substrate; a first optical member that allows the divergent light flux of the predetermined linearly polarized light to enter therein with a predetermined angle of incidence and then guides a light flux to the test substrate; a second optical member that allows a light flux from the test substrate to enter therein, emits a convergent light flux thereof with a predetermined angle of emergence and forms an image at a specific surface; an extraction unit that extracts linearly polarized light in the convergent light flux from the second optical member, which is perpendicular to the predetermined linearly polarized light; a light-receiving unit that receives an image of the test substrate formed via the second optical member and the extraction unit; and at least one polarization correcting member disposed within a light path extending between the light source unit and the light-receiving unit, which corrects a disruption of a polarization plane attributable to the first optical member and the second optical member.

Surface inspection apparatus, polarization illuminating device and light-receiving device

A substrate (1) including a plurality of electrically conducting vias (51) has electrical conductors (52, 53) disposed on its surfaces interconnecting pairs of the vias (51). The vias (51) and the electrical conductors (52, 53) form a first helical winding (47). Electrically insulating films (41, 42) disposed on opposite sides of the substrate (41) include further vias penetrating the insulating films and the substrate. These vias are interconnected in pairs to form a second helical winding (48) that at least partially surrounds the first winding (47) and is inductively coupled to the first helical winding (47). A relatively large mutual inductance between the two helical windings (47, 48) in a relatively small volume is achieved.

Yasuharu Nakajima

Papers

Inductive structures for semiconductor integrated circuits

Integrated circuit device

Method for testing semiconductor element

Surface inspection apparatus, polarization illuminating device and light-receiving device

Transformer integrable with a semiconductor integrated circuit and method for producing thereof