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Yasuhiro Nasu

Researcher at Fujitsu

Publications -  60
Citations -  703

Yasuhiro Nasu is an academic researcher from Fujitsu. The author has contributed to research in topics: Electrode & Layer (electronics). The author has an hindex of 10, co-authored 60 publications receiving 703 citations.

Papers
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Patent

Method of manufacturing active matrix display device using insulation layer formed by the ale method

TL;DR: In this article, the ALE method is used to form an active matrix display (AMD) insulation layer, which comprises the predetermined number of repeated cycles of the steps of subjecting a substrate to the vapor of a metal inorganic/organic compound, which can react with H 2 O and/or O 2 and form the metal oxide.
Patent

Manufacture of thin film transistor

TL;DR: In this paper, a method of anisotropic dry etching proceeding straight vertically is applied to the surface of the channel protection film with a resist film used as a mask, an overhanging part of the resist film is removed subsequently, a process of film formation for forming the source and drain electrodes is applied and then the resist mask is removed.
Patent

Method of manufacturing thin film transistors in a liquid crystal display apparatus

TL;DR: In this article, a first sheet of photomask is used when a gate electrode and a gate bus line are formed, a second sheet of mask is used for patterning a semiconductor film which becomes an active layer of a transistor on the gate electrode, a third sheet of pixel electrode, source electrode, drain electrodes, a drain bus line, and a drain board portion are removed, thereby to form thin film transistors arranged in a matrix form.
Patent

Color filter forming method

TL;DR: In this article, the ink jet head is movable in a plane parallel to a substrate and while the head 2 is moved, ink color particles from the ink injection opening 2a are brought under injection control to draw a pattern on the substrate with color ink.
Patent

Thin-film transistor matrix device and its production

TL;DR: In this paper, the authors proposed a thin-film transistor (TFT) matrix device which can decrease the damages of an insulating film for storage capacities in an etching stage at the time of forming the TFTs.