This paper aims to compare different design alternatives of hardware-in-the-loop (HIL) for emulating power converters in Field Programmable Gate Arrays (FPGAs). It proposes various numerical formats (fixed and floating-point) and different approaches (pure VHSIC Hardware Description Language (VHDL), Intellectual Properties (IPs), automated MATLAB HDL code, and High-Level Synthesis (HLS)) to design power converters. Although the proposed models are simple power electronics HIL systems, the idea can be extended to any HIL system. This study compares the design effort of different coding methods and numerical formats considering possible synthesis tools (Precision and Vivado), and it comprises an analytical discussion in terms of area and speed. The different models are synthesized as ad-hoc modules in general-purpose FPGAs, but also using the NI myRIO device as an example of a commercial tool capable of implementing HIL models. The comparison confirms that the optimum design alternative must be chosen based on the application (complexity, frequency, etc.) and designers’ constraints, such as available area, coding expertise, and design effort.

Comparison of Different Design Alternatives for Hardware-in-the-Loop of Power Converters

Real-time simulation is an increasingly popular tool for product development and research in power systems. However, commercial simulators are still quite exclusive due to their costs and they face problems in bridging the gap between two common types of power system simulation, conventional phasor based, and electromagnetic transient simulation. This work describes recent improvements to the open source real-time simulator DPsim to address increasingly important use cases that involve power electronics that are connected to the electrical grid and increasing grid sizes. New power electronic models have been developed and integrated into the DPsim simulator together with techniques to decouple the system solution, which facilitate parallelization. The results show that the dynamic phasors in DPsim, which result from shifted frequency analysis, allow the user to combine the characteristics of conventional phasor and electromagnetic transient simulation. Besides, simulation speed up techniques that are known from the electromagnetic domain and new techniques, specific to dynamic phasors, significantly improve the performance. It demonstrates the advantages of dynamic phasor simulation for future power systems and the applicability of this concept to large scale scenarios.

DPsim—Advancements in Power Electronics Modelling Using Shifted Frequency Analysis and in Real-Time Simulation Capability by Parallelization

Real-time simulation of modular multilevel converter (MMC) is essential for delivering practical projects. However, existing real-time MMC simulators have functional limitations in some aspects. To solve this problem, this paper presents a general-purpose MMC emulator with a hybrid submodule topology. The MMC emulator is implemented on the field-programmable gate array (FPGA), supporting all circuit parameters flexible configuration and internal fault real-time simulation with a time-step of 2$\mu$s. Each submodule has its own independent storage space for configurability. To improve the accuracy of the simulation, all equations are calculated in the single floating-point precision. This paper adopts a novel method based on partial results caching and merging unit, which can reduce the latency of the accumulation. Moreover, a fault parameter addressing module is presented to simulate internal MMC valve faults. The real-time simulation results, which are obtained by simulating YUE Back-to-Back Project, are provided to verify the correctness of the designed emulator.

A Real-Time Hybrid Modular Multilevel Converters Emulator for Hardware-in-Loop-Tests

A network-decomposition-based multi-rate parallel transient simulation technique for active distribution networks

This letter presents an event-synchronous time-asynchronous (ESTA) method for controller hardware-in-the-loop (CHIL) simulations of modular multilevel converters (MMCs). The proposed method aims to address the issue of extensive power circuit simulation calculations, which may result in incomplete data interaction within an interaction cycle and subsequently cause CHIL simulation failure. Unlike conventional time-synchronous simulations, the proposed ESTA method employs data interaction events to trigger simulation and control calculations. Furthermore, state and switching events are utilized to drive simulation calculations, reducing the calculation points of the simulator. As a result, the controller and simulator in CHIL systems exhibit synchronous event logic and asynchronous timing. The proposed ESTA method allows for accurate CHIL simulations even when the simulator faces significant computational tasks. The simulated and experimental results from a 10kVA MMC are provided to validate the proposed ESTA method. This letter provides an effective method for simulating large-scale MMCs in the CHIL simulation system, offering a promising avenue for this field. 

Event-Synchronous Time-Asynchronous Method for Controller HIL Simulation of 10kVA Modular Multilevel Converters

Field-programmable gate array (FPGA)-based simulation system is applied in real-time electromagnetic transient (EMT) simulation for small time-step simulation. However, the FPGA-based simulation system requires handcrafted hardware description language (HDL) and significant design efforts. This paper explores FPGA-based EMT real-time simulation system design using high-level synthesis (HLS) technology to accelerate the design process and improve the flexibility, because high-level language can be transferred into HDL using HLS. Furthermore, loop unroll and pipeline optimisation directives are analysed and applied for HLS to improve the computation speed of the components. The system can simulate various components, including switches, R-L-C, voltage sources, current sources, and transmission lines. Especially, the system adopting double-precision floating-point calculation can support the network with 74 nodes and achieve 2 us for each small time step on Xilinx Virtex7-690 T FPGA. Comparison of simulation results from offline simulation tools with those from the proposed simulation system validates the correctness of the FPGA-based EMT simulation system using HLS technology.

Exploration of FPGA-based electromagnetic transient real-time simulation system design using high-level synthesis

Real-time simulation of a modular multilevel converter (MMC) plays an important role on the area of large-scale power electronics research. The authors propose a real-time MMC simulation system in a heterogeneous computing platform containing the central processing unit (CPU) and field programmable gate array (FPGA). This system decouples the MMC circuits from the grid based on the alternative circuit equivalent model of the MMC bridge arm. Furthermore, the parallel calculation of the equivalent circuits is achieved when the peripheral circuit is realised on the CPU and the MMC arms are realised on FPGA. In addition, a timing optimisation strategy is discussed to reach the timing target requirement. To validate the MMC simulation system, a case study of a grid with 12 MMC bridges and 640 sub-modules per bridge at 2 μs time step on Xilinx Virtex-7 XC7VX690T FPGA is simulated in real time. The real-time simulation results demonstrate high accuracy of the simulation system in comparison to the offline simulation of the original system in the electromagnetic transient program and our design is competitive to recent published works.

Yinxing Xiang

Papers

Exploration of FPGA-based electromagnetic transient real-time simulation system design using high-level synthesis

A Real-Time Hybrid Modular Multilevel Converters Emulator for Hardware-in-Loop-Tests

Design and implementation of the MMC simulation system in the heterogeneous FPGA-CPU platform