An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

A simplified process for flip-chip attachment of a chip (10) to a substrate (20) is provided by pre-coating the chip (10) with an encapsulant underfill material (22) having discrete solder columns therein to eliminate the conventional capillary flow underfill process. Such a structure permits incorporation of remeltable layers for rework, test, or repair. It also allows incorporation of electrical redistribution layers. In one aspect, the chip (10) and pre-coated encapsulant are placed at an angle to the substrate and brought into contact with the pre-coated substrate, then the chip (10) and pre-coated encapsulant are pivoted about the first point of contact, expelling any gas therebetween until the solder bumps (14) on the chip are fully in contact with the substrate (20). There is provided a flip-chip configuration having a compliant solder/flexible encapsulant understructure that deforms generally laterally with the substrate (20) as the substrate (20) undergoes expansion and contraction. With this configuration, the compliant solder/flexible encapsulant understructure absorbs the strain caused by the substrate without bending the chip (10) and substrate (20).

Semiconductor flip-chip package and method for the fabrication thereof

A component built-in module including a core layer formed of an electric insulating material, and an electric insulating layer and a plurality of wiring patterns, which are formed on at least one surface of the core layer. The electric insulating material of the core layer is formed of a mixture including at least an inorganic filler and a thermosetting resin. At least one or more of active components and/or passive components are contained in an internal portion of the core layer. The core layer has a plurality of wiring patterns and a plurality of inner vias formed of a conductive resin. The electric insulating material formed of the mixture including at least an inorganic filler and a thermosetting resin of the core layer has a modulus of elasticity at room temperature in the range from 0.6 GPa to 10 GPa. Thus, it is possible to provide a thermal conductive component built-in module capable of filling the inorganic filler with high density; burying the active component such as a semiconductor etc. and the passive component such as a chip resistor, a chip capacitor, etc. in the internal portion of the substrate; and simply producing a multilayer wiring structure.

Component built-in module and method for producing the same

A method of closely interconnecting integrated circuits contained within a semiconductor wafer to electrical circuits surrounding the semiconductor wafer. Electrical interconnects are held to a minimum in length by making efficient use of polyimide or polymer as an inter-metal dielectric thus enabling the integration of very small integrated circuits within a larger circuit environment at a minimum cost in electrical circuit performance.

Top layers of metal for high performance IC's

A three dimensional flexible assembly of integrated circuits and method of fabricating the assembly of circuits including a folded flexible substrate with integrated circuit chips. The invention has provisions for allowing mechanical and electrically functional attachment of integrated circuit chips to one or both sides of the flexible substrate using flip chip assembly techniques. In addition, a rigid package substrate is provided upon which the folded substrate is secured with the associated chips. The chips are electrically connected to the flexible substrate and the flexible substrate is in turn electrically connected to the rigid substrate. A cover is also provided that covers and protects the flexible substrate and the associated chips as well as a portion of the connected rigid package substrate In an additional embodiment, the cover and rigid substrate are omitted and instead the combined folded flexible substrate and integrated circuit chips are encapsulated with a suitable compound.

Three-dimensional flexible assembly of integrated circuits

A semiconductor device includes a semiconductor chip which is connected to a circuit substrate via solder bumps by flip-chip connection, a first encapsulant having a large Young's modulus and filling a space between the semiconductor chip and the circuit substrate in the central portion of the semiconductor chip, and a second encapsulant having a small Young's modulus and filling a space between the semiconductor chip and the circuit substrate in the peripheral portion of the semiconductor chip. A method for manufacturing the semiconductor device includes flowing the second encapsulant into position, but not the first encapsulant.

Flip-chip semiconductor devices having two encapsulants

An Al layer which serves as a lead-out electrode is formed on a semiconductor chip. An insulating layer is formed on the semiconductor chip and the Al layer. The insulating layer has an opening formed in that portion thereof which is located on the Al layer, thereby exposing a portion of the Al layer. A multi-level metal layer (barrier metal layer) is formed on the exposed portion of the Al layer and on that portion of the insulating layer which is located along the edge of the opening. A metallic nitride region is provided between a first-level metal layer in the multi-level metal layer and the insulating layer so as to be selectively formed at or under a peripheral portion of the first-level metal layer. A bump electrode is provided on the multi-level metal layer. The resultant semiconductor device is mounted on a circuit board by flip chip bonding, with the bump electrode interposed therebetween.

Connecting electrode portion in semiconductor device

In a flip chip mounting type semiconductor device, on a corner portion of a chip subjected to flip chip mounting, a gate region for injecting a sealing member filled between a mounted board and the chip is arranged. In this semiconductor device, a semiconductor element has a plurality of bumps formed on the peripheral portion on a major surface along each side, a plurality of pad electrodes are formed on the major surface of the circuit board, and the pad electrodes join the bumps. A resin sealing member is filled between the semiconductor element and the circuit board. A gate region through which the resin sealing member is injected is formed on a corner portion of the semiconductor element. In the gate region, no bump is formed, or bumps are arranged at intervals smaller than that in another region. For this reason, the resin uniformly enters the space between the semiconductor element and the circuit board through the gate region.

Flip chip mounting type semiconductor device

A first insulating film is formed on an integrated circuit chip on which an I/O pad is formed A first opening portion is formed above the I/O pad A conductive layer and a barrier metal layer which are electrically connected to the I/O pad through the first opening portion are stacked on the first insulating film The conductive layer and the barrier metal layer are patterned by a single mask A second insulating film is formed on the resultant structure A second opening portion is formed in the second insulating film at a position different from that of the first opening portion A solder bump or metal pad is formed on the barrier metal layer in the second opening portion The position of the solder bump or metal pad is defined by the second opening portion

Flip-chip connection type semiconductor integrated circuit device

Since an electronic device comprises an electronic component, an external connection terminal electrically connected to the electronic component, and an envelope for sealing the electronic part and having a thickness less than about 0.5 mm, the electronic device is miniaturized even in the case where it is provided with a large number of terminals. Further, since the electronic component is sealed by the envelope, moisture, etc. is not admitted into the electronic component, resulting in high reliability. In addition, since the thickness of the envelope is thin, the external terminal can be shortened. Thus, the inductance or capacitance of this terminal can be reduced.

Yoichi Hiruta

Papers

Flip-chip semiconductor devices having two encapsulants

Connecting electrode portion in semiconductor device

Flip chip mounting type semiconductor device

Flip-chip connection type semiconductor integrated circuit device

Electronic device having a chip with an external bump terminal equal or smaller than a via hole on a board