A novel voltage selection circuit in which only one of a plurality of voltage levels (VPPP, VCC, ground) is selected for application to an output node (205) at any given time. Switching transistors (211, 212, 213) are connected between the output node (205) and associated reference voltages. Switching transistors (211, 212, 213) are controlled by a set of voltage selection signals (Q1, Q2, Q3), each having logical zero and logical one states which are of sufficient magnitude to cause said switching transistors (211, 212, 213) to turn on or turn off, and which are insured to be nonoverlapping. Two of the voltages are ground and VCC, which are switched by associated transistors (212, 213) using voltage selection signals having standard levels, such as ground and VCC. Another voltage VPPP is greater than VCC, and is switched by a switching transistor (211) utilizing a voltage selection signal greater than VCC, preferably equal to VPPP. The wells of the second (212) and third (211) switching transistors are connected in common to VPPP to prevent junction breakdown when VPPP is selected. A novel selection circuit (300) is used to provide nonoverlapping voltage selection signals (Q1, Q2, Q3) in response to a plurality of control signals ( I 1, I 2, I 3) indicative of which voltage supply is to be selected at any given time.

Selecting one of a plurality of voltages without overlap

An automatic stop control circuit is so constructed that in a period wherein the photo metering output signal is adversely affected by a counter electromotive pulse generated during the operative period of the electromagnetic release device for camera release, the operation of the automatic stop control circuit is prohibited. Note that the camera release herein includes a release operation for initiating a series of operations including the stop-down operation for taking a photograph, a mirror-up operation and a shutter running operation.

Automatic stop control circuit for camera

An automatic exposure control apparatus for a camera has the shutter release button and the memory shutter release button as switches with slidable contacts, a photodetector for detecting brightness of an object, a capacitor for holding the detected photometric value of the photodetector, and a bias circuit. When the shutter release button is depressed by a first stroke, power is turned on. After framing for a memory lock, the first stroke depression of the shutter release button is released, and the memory lock button is depressed. An exposure memory lock is completed. After framing for photography, the memory lock button is depressed again. Thereafter, the shutter release button is depressed by the first stroke, and a picture is taken. When the shutter release button is released and the memory clock button is released, the exposure memory lock is maintained. The exposure value held by the capacitor can be cancelled when the shutter release button is depressed by the first stroke while the memory lock button is released.

Exposure control apparatus of a camera

In a camera having a capacitor connected between DC power source lines and at least one electrical circuit connected between the power source lines, each of the electrical circuits including a semiconductor switch element in the current route between the power source lines for interrupting the current flowing through the circuit, a device for controlling the power supply to each of the electrical circuits includes main switch means provided between the power source lines for applying a bias current to the semiconductor element.

Yoshiaka Ohtsubo

Papers

Power supply control circuit in a camera

Steuerschaltung in einer kamera fuer die energieversorgung