PURPOSE:To obtain a circuit to be operated at high speed by constituting the title circuit with a master part and a specified slave part. CONSTITUTION:The slave part includes a transfer gate SW2 connected to the output side of a gate circuit 3 of the master part, an inverter 5 which inverts the output of the transfer gate SW2, amplifies it and outputs it to an output terminal Q, an inverter 6 which similarly inverts and amplifies the output of the transfer gate SW2, an inverter 7 which inverts and amplifies the output of the inverter 6, and outputs it to an inverting output terminal, Q and a p- channel pull up transistor P3, whose gate is connected to a reset terminal R, to pull-up the output side of the transfer gate SW2 at a reset time. The gates of transfer gates SW1 and SW2 are connected through inverters 1 and 2 to a clock terminal CK. Since the slave part does not have an inverter for returning, the switch of an output is executed at the high speed.

Flip-flop circuit

PURPOSE:To decrease the number of elements by providing an FF circuit which has no resetting function basically with an N channel transistor (TR) where the state of a transfer gate is fixed at the time of resetting, and providing a means which adds a reset circuit to a master side FF circuit. CONSTITUTION:A CMOS type FF circuit consists of the master-side FF circuit 30 having a reset circuit and a slave-side FF circuit 31 having no reset circuit and the circuit 30 has an N channel TR 40. When a clock signal and a reset signal are supplied, a NOR circuit 22 turns off transfer gates 1 and 4 and turns on transfer gates 2 and 3. At this time, the circuit 30 is in a hold state and the TR 40 is on, so an output Q at a low level. When an initial value is at a high level, the P channel TR of an inverter 15 is on, so the driving capability of the TR 40 is increased sufficiently and a voltage lower than the switching voltage of an inverter 10 is inputted.

Yoshida Michio

Papers

Flip-flop circuit