One embodiment of the present invention provides a switch. The switch includes a tunnel management module, a packet processor, and a forwarding module. The tunnel management module operates the switch as a tunnel gateway capable of terminating an overlay tunnel. During operation, the packet processor, which is coupled to the tunnel management module, identifies in a data packet a virtual Internet Protocol (IP) address associated with a virtual tunnel gateway. This virtual tunnel gateway is associated with the switch and the data packet is associated with the overlay tunnel. The forwarding module determines an output port for an inner packet in the data packet based on a destination address of the inner packet.

Overlay tunnel in a fabric switch

One embodiment of the present invention provides a switch capable of processing software-defined data flows. The switch includes an identifier management module and a flow definition management module. During operation, the identifier management module allocates a logical identifier to a link aggregation port group which includes a plurality of ports associated with different links. The flow definition management module processes a flow definition corresponding to the logical identifier, applies the flow definition to ports in the link aggregation port group, and update lookup information for the link aggregation port group based on the flow definition.

Link aggregation in software-defined networks

A bus recovery system for multi-master bus system comprises a plurality of bus masters selectively interfacing with a system bus whereby access to the bus is controlled by a bus arbiter. A plurality of counters corresponding to each of the plurality of masters contains a pre-determined time value corresponding to the maximum time each of the plurality of masters may be granted access to bus. The arbiter releases ownership of the bus when the pre-determined time value in the counter has been exceeded by master currently accessing the bus. A register identifies which of the masters had access to the bus when the predetermined time value was exceeded.

Bus recovery apparatus and method of recovery in a multi-master bus system

One embodiment of the present invention provides a system for facilitating flow definition management in a switch. During operation, the system identifies a generic flow definition which specifies a flow that is not specific to any input port of a switch. The system further stores in a flow lookup data structure one or more port-specific flow rules based on the generic flow definition, wherein each port-specific flow rule corresponds to a respective port capable of processing data flows.

System and method for flow management in software-defined networks

Methods and techniques for flooding packets on a per-virtual-network basis are described. Some embodiments provide a method (e.g., a switch) which determines an internal virtual network identifier based on one or more fields in a packet's header. Next, the method performs a forwarding lookup operation based on the internal virtual network identifier. If the forwarding lookup operation succeeds, the method can process and forward the packet accordingly. However, if the forwarding lookup operation fails, the method can determine a set of egress ports based on the internal virtual network identifier. Next, for each egress port in the set of egress ports, the method can flood the packet if a virtual network identifier in the packet's header is associated with the egress port. Flooding packets on a per-virtual-network basis can substantially reduce the amount of resources required to flood the packet when a forwarding lookup operation fails.

Flooding packets on a per-virtual-network basis

A communication control system includes a control server for controlling a process rule held in a forwarding node. The control server includes a network information storage unit for storing a logical network identifier which is an identifier of a logical network defined by setting of the forwarding node, and a correspondence relation between a device connected to the forwarding node and the logical network; and an address resolution unit for, upon receiving from the forwarding node an address resolution request for a destination communication device which is a destination of the packet or a communication device for forwarding the packet received from a source communication device which is a source of the packet to another device, performing interlayer address resolution for the destination communication device or the communication device, and setting the logical network identifier of the logical network to which the source communication device belongs.

Communication control system, control server, forwarding node, communication control method, and communication control program

A bus arbitration system for a data processing apparatus to which a plurality of bus masters are connected. The counter section counts the duration of bus occupation of the bus masters. The arbitrating section of the apparatus monitors whether the bus is occupied. If the bus is not occupied, the bus occupation times of the bus masters with valid request signals are compared. Priority is then given to the bus master with the shortest occupation time unless the occupation times are equal, in which case, priority is given in a predetermined order. An initializing section initializes the counter section at a predetermined interval.

Bus arbitration system

Network Function Visualization (NFV) is becoming a new networking architecture for telecom carriers NFV achieves network functions with software and commercial off the shelf (COTS) servers instead of dedicated hardware While the software-based approach is expected to reduce costs, it could cause performance issues CPU-FPGA tightly coupled architectures may be available in COTS servers in the near future This paper proposes accelerating NFV application leveraging such a CPU-FPGA architecture The proposed method of acceleration uses a data plane development kit (DPDK) ring queue, which is often used in network software, as the communication interface between the FPGA and CPU We propose two optimizations for ring operation and table lookup operation to efficiently use the bus between FPGA and CPU We evaluated the proposed method with an actual CPU+FPGA based platform, and an NFV application, ie, vCPE The results revealed that the evaluation system could accommodate 2 × 40-GbE Internet traffic, and could increase capacity as a vCPE server by x133

Accelerating NFV application using CPU-FPGA tightly coupled architecture

The present invention provides a radio communication system that enables handovers between radio base stations to be conducted at a short time using a mobile communication terminal having one radio communication part. A pseudo radio communication control part in a mobile communication terminal links with a packet transfer part and a remote radio control part in a radio bridge device to enable operation as though a radio communication part disposed in the radio bridge device were directly connected to the mobile communication terminal. Thus, even when radio communication parts are disposed in a plurality of terminals, by using the pseudo radio communication control part instead of a radio communication control part, an application can carry out control as though all the radio communication parts were connected in the same terminal.

Radio communication system and communication method thereof

A wireless communication system includes a first communication station that connects with a higher-order station or a lower-order station in a communication path of multi-hop wireless communication and that carries out wireless communication with a mobile terminal in access areas in predetermined wireless resources that differ from relay areas for wireless communication with the higher-order station or the lower-order station in the wireless resources, and a second communication station that constitutes a communication path that differs from the communication path of the multi-hop wireless communication, that uses the wireless resources to carry out wireless communication with a mobile terminal, and that acquires information indicating the relay areas in the wireless resources.

Yoshikazu Watanabe

Papers

Communication control system, control server, forwarding node, communication control method, and communication control program

Bus arbitration system

Accelerating NFV application using CPU-FPGA tightly coupled architecture

Radio communication system and communication method thereof

Wireless communication system, base station, and wireless communication system control method