An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

The reactive force-field (ReaxFF) interatomic potential is a powerful computational tool for exploring, developing and optimizing material properties. Methods based on the principles of quantum mechanics (QM), while offering valuable theoretical guidance at the electronic level, are often too computationally intense for simulations that consider the full dynamic evolution of a system. Alternatively, empirical interatomic potentials that are based on classical principles require significantly fewer computational resources, which enables simulations to better describe dynamic processes over longer timeframes and on larger scales. Such methods, however, typically require a predefined connectivity between atoms, precluding simulations that involve reactive events. The ReaxFF method was developed to help bridge this gap. Approaching the gap from the classical side, ReaxFF casts the empirical interatomic potential within a bond-order formalism, thus implicitly describing chemical bonding without expensive QM calculations. This article provides an overview of the development, application, and future directions of the ReaxFF method.

https://biblio.ugent.be/publication/8514189/file/8514192.pdf

The ReaxFF reactive force-field: development, applications and future directions

This review paper explores considerations for ultimate CMOS transistor scaling Transistor architectures such as extremely thin silicon-on-insulator and FinFET (and related architectures such as TriGate, Omega-FET, Pi-Gate), as well as nanowire device architectures, are compared and contrasted Key technology challenges (such as advanced gate stacks, mobility, resistance, and capacitance) shared by all of the architectures will be discussed in relation to recent research results

Considerations for Ultimate CMOS Scaling

Applications of atomic layer deposition to nanofabrication and emerging nanodevices

The scaling of complementary metal oxide semiconductor (CMOS) transistors has led to the silicon dioxide layer used as a gate dielectric becoming so thin that the gate leakage current becomes too large. This led to the replacement of SiO2 by a physically thicker layer of a higher dielectric constant or ‘high-K’ oxide such as hafnium oxide. Intensive research was carried out to develop these oxides into high quality electronic materials. In addition, the incorporation of Ge in the CMOS transistor structure has been employed to enable higher carrier mobility and performance. This review covers both scientific and technological issues related to the high-K gate stack – the choice of oxides, their deposition, their structural and metallurgical behaviour, atomic diffusion, interface structure, their electronic structure, band offsets, electronic defects, charge trapping and conduction mechanisms, reliability, mobility degradation and oxygen scavenging to achieve the thinnest oxide thicknesses. The high K oxides were implemented in conjunction with a replacement of polycrystalline Si gate electrodes with metal gates. The strong metallurgical interactions between the gate electrodes and the HfO2 which resulted an unstable gate threshold voltage resulted in the use of the lower temperature ‘gate last’ process flow, in addition to the standard ‘gate first’ approach. Work function control by metal gate electrodes and by oxide dipole layers is discussed. The problems associated with high K oxides on Ge channels are also discussed.

/pdf/high-k-materials-and-metal-gates-for-cmos-applications-4hs77i3c4a.pdf

High-K materials and metal gates for CMOS applications

High-k/Ge MOSFETs for future nanoelectronics

The effects of the nitrogen in the HfSiON gate dielectric on the electrical and thermal properties of the dielectric were investigated. It is clearly demonstrated that nitrogen enhances the dielectric constant of silicates. High dielectric constants of the HfSiON are maintained and boron penetration is substantially suppressed in the HfSiON during high temperature annealing. These properties are ascribed to the homogeneity of the bond structure in the film containing nitrogen through high temperature annealing.

Effects of nitrogen in HfSiON gate dielectric on the electrical and thermal characteristics

To realize a stackable complementary metal–oxide–semiconductor field-effect transistor (CMOSFET) on interlayer dielectrics for three-dimensional (3D) large-scale-integration devices, we investigated poly-Ge thin films formed by flash lamp annealing. The process resulted in crystalline grains of micrometer-order size, and the Hall-effect mobility of holes was as high as 200 cm2 V−1 s−1. A depletion-type trigate poly-Ge channel pMOSFET with a gate length of 80 nm formed on a poly-Ge film exhibited a drive current of 280 µA/µm at a drain voltage of −1 V and a gate overdrive of −1 V. The operation of inversion-type short-channel trigate poly-Ge nMOSFETs was also demonstrated.

https://iopscience.iop.org/article/10.7567/APEX.7.056501/pdf

High-performance poly-Ge short-channel metal–oxide–semiconductor field-effect transistors formed on SiO2 layer by flash lamp annealing

The dielectric properties of noncrystalline hafnium silicon oxynitride ($\mathrm{HfSiON})$ films with a variety of atomic compositions were investigated. The films were deposited by reactive sputtering of Hf and Si in an O, N, and Ar mixture ambient. The bonding states, band-gap energies, atomic compositions, and crystallinities were confirmed by x-ray photoelectron spectroscopy (XPS), reflection electron energy loss spectroscopy (REELS), Rutherford backscattering spectrometry (RBS), and x-ray diffractometry (XRD), respectively. The optical (high-frequency) dielectric constants were optically determined by the square of the reflective indexes measured by ellipsometry. The static dielectric constants were electrically estimated by the capacitance of $\mathrm{Au}∕\mathrm{HfSiON}∕\mathrm{Si}(100)$ structures. It was observed that low N incorporation in the films led to the formation of only $\mathrm{Si}\text{\ensuremath{-}}\mathrm{N}$ bonds without $\mathrm{Hf}\text{\ensuremath{-}}\mathrm{N}$ bonds. An abrupt decrease in band-gap energies was observed at atomic compositions corresponding to the boundary where $\mathrm{Hf}\text{\ensuremath{-}}\mathrm{N}$ bonds start to form. By combining the data for the atomic concentrations and bonding states, we found that $\mathrm{HfSiON}$ can be regarded as a pseudo-quaternary alloy consisting of four insulating components: ${\mathrm{SiO}}_{2}$, ${\mathrm{HfO}}_{2}$, ${\mathrm{Si}}_{3}{\mathrm{N}}_{4}$, and ${\mathrm{Hf}}_{3}{\mathrm{N}}_{4}$. The optical and static dielectric constants for the films showed a nonlinear dependence on the N concentration, whose behavior can be understood in terms of abrupt $\mathrm{Hf}\text{\ensuremath{-}}\mathrm{N}$ bond formation.

https://arxiv.org/pdf/cond-mat/0601503.pdf

Dielectric properties of noncrystalline HfSiON

Fabrication process of HfSiON gate dielectrics by plasma oxidation of CVD Hf silicate followed by plasma nitridation was developed. Thanks to the high quality ultrathin interfacial layer formed by internal plasma oxidation, electron mobility of 240 cm/sup 2//Vs@0.8 MV/cm (85% of SiO/sub 2/) and hole mobility of 73 cm/sup 2//Vs@0.5 MV/cm (93% of SiON) were successfully achieved. The developed process will be promising for the production of low power CMOS devices in the near future.

Yoshiki Kamata

Papers

High-k/Ge MOSFETs for future nanoelectronics

Effects of nitrogen in HfSiON gate dielectric on the electrical and thermal characteristics

High-performance poly-Ge short-channel metal–oxide–semiconductor field-effect transistors formed on SiO2 layer by flash lamp annealing

Dielectric properties of noncrystalline HfSiON

Fabrication of HfSiON gate dielectrics by plasma oxidation and nitridation, optimized for 65 nm mode low power CMOS applications