A method of controlling a brushless motor, the method comprising exciting a winding of the motor for a conduction period over each electrical half-cycle of the motor. The length of the conduction period is defined by a waveform that varies periodically with time. Additionally, a control system that implements the method, and a motor system that incorporates the control system.

Control of a brushless motor

In an integrated circuit system, a filter and an oscillator are referenced to a common reference circuitry through a suitable control loop to provide filter time constant and oscillator frequency references. The oscillator (Fig. 3) and the filter (Fig. 4) are implemented in a manner where the monolithic pattern elements setting the fundamental control parameters (time-period and time-constant respectively) are of the same type. Monolithic capacitors are used as one of the common passive elements between the oscillator and the filter to set the time-period and time-constants, respectively, adjustable through adjustment of control currents (Iosc, Ix). The monolithic implementation of the Control Block (Fig. 3, Fig. 4 and Fig. 7) is such that by tuning the oscillator frequency to the appropriate value through setting of the respective control current (Iosc), the filter time-constants also are appropriately set to satisfy the Nyquist criteria for a sampling rate referenced to the oscillator frequency.

Integrated mosfet resistance and oscillator frequency control and trim methods and apparatus

An I/O bus interface cell includes a driver circuit having an input terminal fed by a logic signal and an output terminal to produce in response thereto a drive signal having selectable rise and fall time characteristics in accordance with a reference voltage provided to the driver. The I/O cell also includes a receiver circuit having an input terminal coupled to said output terminal of said driver with the receiver disposed to latch an unresolved, unamplified received signal prior to resolving the state of the signal. The I/O cell further includes a termination circuit having a terminal connected to the output of said driver, and having a selectable impedance characteristic at said terminal, with said selectable impedance being in accordance with a reference voltage provided to an input of said termination circuit. The termination further includes a circuit to linearize the impedance as a function of the reference voltage. Preferably, the I/O cell the driver, receiver and termination circuits are fabricated on a common semiconductor substrate.

Bus termination resistance linearity circuit

A negative resistance generator includes first and second terminals; first and second inductors connected in series between the terminals; and a semiconductor amplifying device having a first control electrode connected to the first terminal and a first active electrode connected to the second terminal and a second active electrode connected to the junction of the inductors. When employed in an active filter resonator a first variable capacitor is interconnected with the inductors for setting the resonant frequency of the resonator. The resonators may be combined in an active filter with a transmission line where each of the resonators is interconnected to the line by decreasing resistance from the input to the output in order to balance the rf currents to which the resonators are subjected. An improved dual loop active filter control system is achieved by using a master oscillator that employs a resonator that is matched to the active filter resonator in the filter and servoing the frequency and Q-factor controls so that the drive signals are compensated for temperature drifts, manufacturing tolerances, and other problems while a buffer amplifier is used between the master oscillator and the frequency and gain control loops for isolating the master oscillator reference circuit from the loading of the loops and from the perturbation introduced by the frequency reference signal; a frequency shifting circuit in the frequency control loop permits the reference signal to be shifted to a lower or higher frequency than that of the master oscillator.

Active filter resonator and system and negative resistance generator usable therein

A method of controlling an electrical machine, the method comprising exciting a phase winding of the electrical machine with a supply voltage, and freewheeling the phase winding when current in the phase winding exceeds a threshold. The threshold is then adjusted in response to changes in at least one of the supply voltage and the speed of the electrical machine. Additionally, a control system that implements the method and an electrical machine comprising the control system.

Control of an electrical machine

A monolithic semiconductor integrated circuit device includes a differentially operative circuit section, an amplifying element connected to define a current flowing in the differentially operative circuit section and a circuit for adjusting a current flowing in the amplifying element to thereby compensate for variations of electric characteristics from one semiconductor device to another. The current adjusting circuit includes at least one amplifying element and a load resistance for the amplifying element in the current adjusting circuit. The load resistance has a structure suitable for a trimming operation to adjustably determine the resistance value of the load resistance. The amplifying elements are in a current mirror circuit connection with their control electrodes being concerned with each other so that the electric current flowing in the current path between the current receiving and delivering electrodes of the amplifying element connected to define the current flowing in the differentially operative circuit section is controlled by the adjustably determined resistance of the load resistance.

Monolithic semiconductor integrated circuit device having current adjusting circuit

A brushless motor driving apparatus that includes a rotation signal output component, a half-cycle signal generating component, a plurality of counters, and a duty control signal generating component is provided. The plurality of counters, each of which uses a different bit number to count, repeatedly resets a count value and restarts a count operation for every bit number, resets a count value together with rising or falling of a half-cycle signal, and outputs a pulse signal which is inverted for every reset that occurs while the count operation is being performed. The duty control signal generating component generates a duty control signal to determine a duty ratio of a control signal to control driving of a single-phase brushless motor, based on at least two pulse signals selected from the pulse signals output from the plurality of counters.

Brushless motor driving apparatus

An electronic impedance circuit is constructed of a voltage-current converter and a variable gain current amplifier. The voltage-current converter includes first and second transistors of the PNP-type differentially connected. The variable gain current amplifier includes third and fourth transistors of the NPN-type differentially connected, and fifth and sixth transistors of the PNP-type as load means. The bases of the third and fourth transistors are respectively driven by collector signals of the first and second transistors, and a collector signal of the third transistor is fed back to the base of the second transistor. In order to reduce a d.c. offset attributed to a current flowing between the base of the second transistor and the collector of the third transistor, a compensation circuit is connected to the variable gain amplifier. This compensation circuit can provide compensation by producing a compensation current for cancelling the current between the base of the second transistor and the collector of the third transistor.

Electronic impedance circuit including a compensation arrangement for d.c. offset

The present disclosure provides a brushless motor driving circuit capable of clamping an output voltage at a proper voltage, even when a power source voltage changes. Namely, a pre-driver circuit generates a voltage for driving a brushless motor from a source voltage by turning on/off first and second PMOS transistors and first and second NMOS transistors in an H bridge circuit of a drive voltage generating circuit, and applies the voltage to a coil of the brushless motor. A first clamp circuit turns on/off the first NMOS transistor on the ground side so that the output voltage at a first output terminal becomes equal to or lower than the source voltage. A second clamp circuit turns on/off the second NMOS transistor on the ground side so that output voltage at a second output terminal becomes equal to or lower than the source voltage.

Brushless motor driving circuit

Either an input signal of a combining network or an output signal of an inverter arranged on a main path is fed to a side path through a mode switch in a switchable signal compressor/signal expander. Since an input terminal of a control amplifier is connected to a variable filter without passing through a signal amplifier, the deviation of the detection characteristic of a rectifier and integrator attributed to D.C. offset voltages of the signal amplifier and the control amplifier can be reduced. On the other hand, a switchable signal compressor/signal expander in another aspect of performance has a reference voltage generator for producing a D.C. reference voltage, and the output D.C. level of the control amplifier is maintained at a level approximate to the D.C. reference voltage. The other ends of first and second capacitors of the rectifier and integrator are also supplied with the D.C. reference voltage, so that the fluctuation of the detection characteristic of the rectifier and integrator ascribable to the fluctuation of the D.C. reference voltage is reduced.

Yuichi Ohkubo

Papers

Monolithic semiconductor integrated circuit device having current adjusting circuit

Brushless motor driving apparatus

Electronic impedance circuit including a compensation arrangement for d.c. offset

Brushless motor driving circuit

Switchable signal compressor/signal expander