scispace - formally typeset
Y

Yuji Okuda

Researcher at Toshiba

Publications -  8
Citations -  299

Yuji Okuda is an academic researcher from Toshiba. The author has contributed to research in topics: Chirp & Echo (computing). The author has an hindex of 5, co-authored 8 publications receiving 299 citations.

Papers
More filters
PatentDOI

Speech coding system utilizing a recursive computation technique for improvement in processing speed

TL;DR: In this paper, a speech coding system which recursively executes a filter-applied "Toeplitz characteristic" by causing a drive signal (i.e., an excitation signal) to be converted into a "Toplitz matrix" when detecting a pitch period in which distortion of the input vector and the vector subsequent to the application of filter applied computation to the drive signal vector in the pitch forecast called either closed loop or compatible code book is minimized.
Journal ArticleDOI

A 63-mW H.264/MPEG-4 audio/visual codec LSI with module-wise dynamic Voltage/frequency scaling

TL;DR: A single-chip H.264 and MPEG-4 audio-visual LSI for mobile applications including terrestrial digital broadcasting system (ISDB-T / DVB-H) with a module-wise, dynamic voltage/frequency scaling architecture is presented for the first time.
PatentDOI

Speech communication apparatus equipped with echo canceller

TL;DR: In this article, a chirp signal generating unit and a training control unit are used to cancel an acoustic echo generated in a hands-free speech space, when a predetermined condition for starting handsfree speaking is satisfied.
Journal ArticleDOI

A power, performance scalable eight-cores media processor for mobile multimedia applications

TL;DR: An eight-core media processor for mobile multimedia applications, which achieves low power consumption and high performance and enables software reusability and binary compatibility, which notably reduces development costs.
Proceedings ArticleDOI

Design and implementation of scalable, transparent threads for multi-core media processor

TL;DR: The design and implementation of the scalable and transparent parallelization scheme using threads for multi-core processor provide efficient thread scheduling with low overhead and by hiding the actual number of cores, it realizes transparency.