A multichip integrated circuit package comprises a substrate (10) to which is affixed one or more integrated circuit chips (15a, 15b, 15c) having interconnection pads (16). A polymer film (20) overlying and bridging integrated circuit chips present is provided with a plurality of via openings to accommodate a layer of interconnection metallization (25) which serves to connect various chips and chip pads within the interconnection pads disposed on the chips. A significant advantage of the packaging method and configuration of the present invention is the ability for the polymer film to be removed. This significantly improves testability and effectively provides wafer scale integration circuit packages which are free of problems associated with yield and testability.

Multichip integrated circuit packaging configuration and method

An integrated chip package structure and method of manufacturing the same is by adhering dies on an organic substrate and forming a thin-film circuit layer on top of the dies and the organic substrate. Wherein the thin-film circuit layer has an external circuitry, which is electrically connected to the metal pads of the dies, that extends to a region outside the active surface of the dies for fanning out the metal pads of the dies. Furthermore, a plurality of active devices and an internal circuitry is located on the active surface of the dies. Signal for the active devices are transmitted through the internal circuitry to the external circuitry and from the external circuitry through the internal circuitry back to other active devices. Moreover, the chip package structure allows multiple dies with different functions to be packaged into an integrated package and electrically connecting the dies by the external circuitry.

Integrated chip package structure using organic substrate and method of manufacturing the same

A method of measuring an analyte in a biological fluid comprises applying an excitation signal having a DC component and an AC component. The AC and DC responses are measured; a corrected DC response is determined using the AC response; and a concentration of the analyte is determined based upon the corrected DC response. Other methods and devices are disclosed.

System and method for determining an abused sensor during analyte measurement

The present invention provides a test strip for measuring a concentration of an analyte of interest in a biological fluid, wherein the test strip may be encoded with information that can be read by a test meter into which the test strip is inserted.

System and method for coding information on a biosensor test strip

A multi-chip integrated circuit module includes a supporting layer of laminate material over which a high-density interconnect structure is formed. The laminate layer includes a first upper laminate layer (10) having a hole (14) disposed therein for receiving an integrated circuit chip die (56). A lower core laminate layer (16) having a conductive layer (18) and conductive layer (20) disposed on opposite sides thereof is laminated to the lower surface of the layer (10). Plated-through holes (36), (38) and (40) are formed through the two layers (10) and (16) to connect the conductive layer (20) with a conductive layer (12) on the upper surface of the layer (10). A high-density interconnect layer includes two laminate layers (126) and (138), each having vias formed therethrough and via interconnect structures disposed on the surfaces thereof. The via interconnect structures in the layer (126) allow for connections from the die (56) to the conductive layer (12). The via interconnect structures formed in the layer (138) allow interconnection from the upper surface of layer (138) to via interconnects formed in the layer (126). An I/O connector is interfaced with select ones of the plated-through holes with pins (162) and (164). This allows an interface from the module to an operating system through pins (166).

Multi-chip integrated circuit module

A dielectric layer comprising a plurality of sublayers of alternating composition can provide a reduced dielectric constant while providing the adhesion and laser drilling properties of a higher dielectric constant material. Such multi-sublayer dielectric layers may be formed in situ on a high density interconnect structure or may be laminated thereon after their own formation.

Multi-sublayer dielectric layers

A metal is electrolessly plated on a substrate which is first coated with at least one ablatively-removable layer that is selectively irradiated with laser radiation to obtain a pattern for the deposition of metal on the substrate. The electroless plating solution applied to the substrate after the irradiated substrate is coated with a catalyst also serves to remove the unirradiated portion of the ablatively-removable layer. The method is particularly suited for plating fine lines of metal, especially on non-planar surfaces.

Electroless deposition employing laser-patterned masking layer

A process for repairing an electronic army wafer assembly having a short circuit between two non-insulative layers separated by a dielectric layer includes the step of selectively ablating one of the non-insulative layers so as to electrically isolate the situs of the short circuit while maintaining the electrical integrity of the underlying non-insulative layer intact. A laser beam is directed onto the non-insulative layer and scanned in a selected pattern to isolate the situs of the short circuit; the laser is further controlled such that a selected energy density is delivered to the surface to be ablated such that the underlying non-insulative layer is not damaged.

Method of isolating vertical shorts in an electronic array using laser ablation

A method is provided for removing organic material from an organic film in a patterned manner using ultraviolet light at sufficient power density to effect the patterned ablative photodecomposition of an organic film in the form of a blend of aliphatic and aromatic organic material or a copolymer of chemically combined aliphatic units and aromatic units.

Yung Sheng Liu

Papers

Multi-sublayer dielectric layers

Electroless deposition employing laser-patterned masking layer

Method of isolating vertical shorts in an electronic array using laser ablation

Process for removing organic material in a patterned manner from an organic film

Photoselective metal deposition process