There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality.

Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

I and i

Computer algebra systems are now ubiquitous in all areas of science and engineering. This highly successful textbook, widely regarded as the “bible of computer algebra”, gives a thorough introduction to the algorithmic basis of the mathematical engine in computer algebra systems. Designed to accompany oneor two-semester courses for advanced undergraduate or graduate students in computer science or mathematics, its comprehensiveness and reliability has also made it an essential reference for professionals in the area. Special features include: detailed study of algorithms including time analysis; implementation reports on several topics; complete proofs of the mathematical underpinnings; and a wide variety of applications (among others, in chemistry, coding theory, cryptography, computational logic, and the design of calendars and musical scales). A great deal of historical information and illustration enlivens the text. In this third edition, errors have been corrected and much of the Fast Euclidean Algorithm chapter has been renovated.

Modern computer algebra

IEEE transactions on computer-aided design of integrated circuits and systems : a publication of the IEEE Circuits and Systems Society

The core mission of National Institute of Neurological Disorders and Stroke (NINDS) is twofold. First, NINDS seeks fundamental knowledge about the brain and nervous system. Second, NINDS aims to use that knowledge to reduce the burden of neurological diseases. In support of its mission, NINDS performs and funds basic, translational, and clinical neuroscience research on more than 600 neurological diseases, including genetic diseases (e.g. Huntington’s disease; muscular dystrophy), developmental disorders (e.g. cerebral palsy), neurodegenerative diseases (e.g. Parkinson’s disease; Alzheimer’s disease; multiple sclerosis), metabolic diseases (e.g. Gaucher’s disease), cerebrovascular diseases (e.g. stroke; vascular dementia), trauma (e.g. spinal cord and head injury), convulsive disorders (e.g. epilepsy), infectious diseases (e.g. AIDS dementia) and brain tumors. Common marmosets (Callithrix jacchus) offer unique, powerful advantages to both components of the NINDS mission. In support of the first component, marmosets are particularly well suited for neuroanatomical and functional brain studies, as their brains retain the typical anatomical and functional organization of the primate brain. A major advantage is that the marmoset is a lissencephalic primate, which greatly facilitates the mapping of functional brain areas by neuroimaging techniques, such as fMRI and optical imaging, as well as by electrophysiology, with high spatial resolution. In support of the second component, marmosets are excellent models of neurological disorders. Unlike rodents, marmosets are outbred and every individual is genetically different. Further, the marmoset brain has a gray-to-white matter ratio comparable to humans, which strongly facilitates modeling diseases such as multiple sclerosis and small vessel disease. The species also exhibits the breadth of cognitive sophistication that distinguishes primates from other taxonomic groups. Finally, geneedited marmosets can be generated with an intergeneration time and establishment of transgenic lines 2-3 times faster than other primate species, which makes marmosets be the ideal primate species for the development of genetically engineered lines. For all of the above reasons, marmosets are poised to be a central player to advance the core mission of the NINDS.

National Institute of Neurological Disorders and Stroke

This new edition includes more than 107,000 terms and definitions, more than 5,000 new to this edition. More than 45 consultants from all the major medical and health science specialties have reviewed each word for accuracy and clarity, including new consultants for the specialties of endocrinology, gastroenterology, geriatrics, and rheumatology. The art program has also been extensively enhanced and now includes approximately 1,500 images and illustrations.

Stedman's Medical Dictionary

Sensor-based motion recognition integrates the emerging area of wearable sensors with novel machine learning techniques to make sense of low-level sensor data and provide rich contextual information in a real-life application. Although Human Activity Recognition (HAR) problem has been drawing the attention of researchers, it is still a subject of much debate due to the diverse nature of human activities and their tracking methods. Finding the best predictive model in this problem while considering different sources of heterogeneities can be very difficult to analyze theoretically, which stresses the need of an experimental study. Therefore, in this paper, we first create the most complete dataset, focusing on accelerometer sensors, with various sources of heterogeneities. We then conduct an extensive analysis on feature representations and classification techniques (the most comprehensive comparison yet with 293 classifiers) for activity recognition. Principal component analysis is applied to reduce the feature vector dimension while keeping essential information. The average classification accuracy of eight sensor positions is reported to be 96.44% ± 1.62% with 10-fold evaluation, whereas accuracy of 79.92% ± 9.68% is reached in the subject-independent evaluation. This study presents significant evidence that we can build predictive models for HAR problem under more realistic conditions, and still achieve highly accurate results.

https://www.mdpi.com/1424-8220/17/3/529/pdf

A Comprehensive Analysis on Wearable Acceleration Sensors in Human Activity Recognition

Assertion based design, and more specifically, assertion based verification (ABV) is quickly gaining wide acceptance in the design community. Assertions are mainly targeted at functional verification during the design and verification phases. In this paper, we concentrate on the use of assertions in post-fabrication silicon debug. We develop tools that efficiently generate the checkers from assertions, for their inclusion in the debug phase. We also detail how a checker generator can be used as a means of circuit design for certain portions of self test circuits, and more generally the design of monitoring circuits. Efficient subset partitioning of checkers for a dedicated fixed-size reprogrammable logic area is developed for efficient use of dedicated debug hardware

http://www.iml.ece.mcgill.ca/people/professors/zilic/isqed07.pdf

Assertion Checkers in Verification, Silicon Debug and In-Field Diagnosis

Assertion-based verification with languages such as PSL is gaining in importance. From assertions, one can generate hardware assertion checkers for use in emulation, simulation acceleration and silicon debug. We present techniques for checker generation of the complete set of PSL properties, including all variants of operators, both strong and weak. A full automata-based approach allows an entire assertion to be represented by a single automaton, hence allowing optimizations that can not be done in a modular approach where subcircuits are created only for individual operators. For this purpose, automata algorithms are developed for the base cases, and a complete set of rewrite rules is derived for other operators. Automata splitting is introduced for an efficient implementation of the eventuallye operator.

https://dl.acm.org/doi/pdf/10.1145/1297666.1297670

Automata-based assertion-checker synthesis of PSL properties

This paper presents techniques that enhance automatically generated hardware assertion checkers to facilitate debugging within the assertion-based verification paradigm. Starting with techniques based on dependency graphs, we construct the algorithms for counting and monitoring the activity of checkers, monitoring assertion completion, as well as introduce the concept of assertion threading. These debugging enhancements offer increased traceability and observability within assertion checkers, as well as the improved metrics relating to the coverage of assertion checkers. The proposed techniques have been successfully incorporated into the MBAC checker generator.

/pdf/adding-debug-enhancements-to-assertion-checkers-for-hardware-23rjc4mjaz.pdf

Adding Debug Enhancements to Assertion Checkers for Hardware Emulation and Silicon Debug

A popular network topology for network-on-chip (NoC) implementations is the two-dimensional mesh. A disadvantage of the mesh topology is in its large communication radius. By partitioning a two-dimensional mesh into several sub-meshes and connecting them using a global interconnect, we can reduce the average number of hops for global traffic. This paper presents a hybrid architecture that partitions a large 2D-mesh into several smaller sub-meshes which are globally connected using a hierarchical ring interconnect. Hierarchical rings have been selected for study because of their simplicity, speed and efficiency in embedding onto a circuit layout, as well as for their suitability for efficient cache coherent protocols. An original SystemC modeling platform was implemented in order to compare the traditional 2D-mesh with the hybrid ring architectures and the simulation results will show that our hybrid architecture does indeed have a positive effect on the average hop count

/pdf/a-hybrid-ring-mesh-interconnect-for-network-on-chip-using-1gykykulgj.pdf

Zeljko Zilic

Papers

A Comprehensive Analysis on Wearable Acceleration Sensors in Human Activity Recognition

Assertion Checkers in Verification, Silicon Debug and In-Field Diagnosis

Automata-based assertion-checker synthesis of PSL properties

Adding Debug Enhancements to Assertion Checkers for Hardware Emulation and Silicon Debug

A Hybrid Ring/Mesh Interconnect for Network-on-Chip Using Hierarchical Rings for Global Routing