Review article: Automated fabric defect detection-A review

The defect detection on manufactures is extremely important in the optimization of industrial processes; particularly, the visual inspection plays a fundamental role. The visual inspection is often carried out by a human expert. However, new technology features have made this inspection unreliable. For this reason, many researchers have been engaged to develop automatic analysis processes of manufactures and automatic optical inspections in the industrial production of printed circuit boards. Among the defects that could arise in this industrial process, those of the solder joints are very important, because they can lead to an incorrect functioning of the board; moreover, the amount of the solder paste can give some information on the quality of the industrial process. In this paper, a neural network-based automatic optical inspection system for the diagnosis of solder joint defects on printed circuit boards assembled in surface mounting technology is presented. The diagnosis is handled as a pattern recognition problem with a neural network approach. Five types of solder joints have been classified in respect to the amount of solder paste in order to perform the diagnosis with a high recognition rate and a detailed classification able to give information on the quality of the manufacturing process. The images of the boards under test are acquired and then preprocessed to extract the region of interest for the diagnosis. Three types of feature vectors are evaluated from each region of interest, which are the images of the solder joints under test, by exploiting the properties of the wavelet transform and the geometrical characteristics of the preprocessed images. The performances of three different classifiers which are a multilayer perceptron, a linear vector quantization, and a K-nearest neighbor classifier are compared. The n-fold cross-validation has been exploited to select the best architecture for the neural classifiers, while a number of experiments have been devoted to estimating the best value of K in the K-NN. The results have proved that the MLP network fed with the GW-features has the best recognition rate. This approach allows to carry out the diagnosis burden on image processing, feature extraction, and classification algorithms, reducing the cost and the complexity of the acquisition system. In fact, the experimental results suggest that the reason for the high recognition rate in the solder joint classification is due to the proper preprocessing steps followed as well as to the information contents of the features

Application of neural networks in optical inspection and classification of solder joints in surface mount technology

Defect detection is an essential requirement for quality control in the production of printed circuit boards (PCBs) manufacturing. The traditional defect detection methods have various drawbacks, such as strongly depending on a carefully designed template, highly computational cost, and noise-susceptibility, which pose a significant challenge in a production environment. In this paper, a deep learning-based image detection method for PCB defect detection is proposed. This method builds a new network based on Faster RCNN. We use a ResNet50 with Feature Pyramid Networks as the backbone for feature extraction, to better detect small defects on the PCB. Secondly, we use GARPN to predict more accurate anchors and merge the residual units of ShuffleNetV2. The experimental results show that this method is more suitable for use in production than other PCB defect detection methods. We have also tested in other PCB defects dataset, and experiments have shown that this method is equally valid.

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Detection of PCB Surface Defects With Improved Faster-RCNN and Feature Pyramid Network

Inspection of solder joints has been a critical process in the electronic manufacturing industry to reduce manufacturing cost, improve yield, and ensure product quality and reliability. This paper proposes two inspection modules for an automatic solder joint classification system. The ''front-end'' inspection system includes illumination normalisation, localisation and segmentation. The ''back-end'' inspection involves the classification of solder joints using the Log-Gabor filter and classifier fusion. Five different levels of solder quality with respect to the amount of solder paste have been defined. The Log-Gabor filter has been demonstrated to achieve high recognition rates and is resistant to misalignment. This proposed system does not need any special illumination system, and the images are acquired by an ordinary digital camera. This system could contribute to the development of automated non-contact, non-destructive and low cost solder joint quality inspection systems.

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Design and development of automatic visual inspection system for PCB manufacturing

Lossless data compression algorithms are widely used by data communication systems and data storage systems to reduce the amount of data transferred and stored. GZIP is a popular, patent-free compression program that delivers good compression ratios. This paper presents hardware implementations for the LZ77 encoders and Huffman encoders that form the basis for a full hardware implementation of a GZIP encoder. The designs have been implemented as state machines in VHDL in such a way that they are suitable for implementation using either FPGA or ASIC technologies. Performance metrics and resource utilization results obtained for a prototype implementation running on an Altera DE2 board are presented. Ultimately, the goal is to utilized the LZ77 encoders and Huffman encoders described in this paper to build a fully-functional, hardware design for a GZIP encoder that could be used in data communication systems and data storage systems to boost overall system performance.

FPGA-Based Lossless Data Compression using Huffman and LZ77 Algorithms

Compression is very important for systems with limited channel bandwidth and/or limited storage size. One of the main components in image/video compression is variable length coding (VLC). This paper discusses one of the most popular VLC technique known as Huffman coding. A real time hardware parallel Huffman decoder has been successfully designed and implemented using 50,000 gate FPGA (FLEX10K20 from Altera). The parallelism is exploited in the design to achieve the high frame rate such as in JPEG and MPEG implementation. Using a parallel technique, a codeword is guaranteed to be processed within a single clock cycle. The codeword to be processed is matched with the one stored in a look up table (LUT). A LUT is needed during the coding and decoding process. In order to save memory cost, an optimized LUT is suggested. This paper does not intend to complete an optimized operating speed design, but instead only concentrates on producing a workable real-time decoder design.

Parallel Huffman decoder with an optimized look up table option on FPGA

The methodology and results regarding the use of wavelet transform and multiresolution analysis in automated visual printed circuit board (PCB) inspection provide the motivation for this research In the paper, the wavelet-based image difference algorithm proposed is applied to a sample PCB image The algorithm is applied by using a Haar wavelet where several different numbers of levels are considered One conclusion from this paper is that the second level Haar wavelet transform should be selected for the application of visual PCB inspection

Analysis of the wavelet-based image difference algorithm for PCB inspection

One of the backbones in electronic manufacturing industry is the printed circuit board (PCB) manufacturing. Due to the fatigue and speed requirement, manual inspection is ineffective to inspect every printed circuit board. Hence, this paper presents an efficient algorithm for an automated visual PCB inspection system that is able to automatically detect and locate any defect on PCBs. The defect is detected by utilizing wavelet-based image difference algorithm. The coarse resolution defect localization algorithm, is also presented. The coarse resolution defect localization algorithm is applied to the coarse resolution differenced image in order to locate the defective area on the fine resolution tested PCB image. In addition, the performance of the algorithm is evaluated to verify the efficiency of the proposed algorithm in term of computation time. This new method turned out to be computationally less intensive than traditional image difference operation. One conclusion from this paper is that the second level Haar wavelet transform should be chosen for the application of automated visual PCB inspection.

Performance evaluation of wavelet-based PCB defect detection and localization algorithm

This paper describes the (field programmable gate array) FPGA implementation of two dimensional forward and inverse discrete cosine transform (2D-DCT and 2D-IDCT) using the 100 K gate ALTERA FLEX10K100 FPGA/CPLD. The architecture used in both 2D-DCT and 2D-IDCT is based on the conventional row-column decomposition method. The use of a fast algorithm and distributed arithmetic (DA) technique to implement the DCT and IDCT greatly reduces the hardware complexity.

Implementation of two dimensional forward DCT and inverse DCT using FPGA

Image/video compression is one of the major components used in video-telephony, videoconferencing and multimedia-related applications. Compression allows efficient utilization of channel bandwidth and/or storage size. One of the commonly used methods for image and video compression is JPEG (an image compression standard). In our present work, a real time (the first made in Malaysia) JPEG hardware decoder has been successfully designed and implemented using 100,000 gate FPGA (FLEX10K100 from Altera). The fully functional JPEG decoder prototype is capable of decompressing compressed data to achieve a frame rate of 30 frames per second (for a frame size of 320/spl times/240 pixels). Currently the design supports gray scale images, but with some modification and addition of tables to handle the chrominance component, the JPEG decoder can easily handle color images. The major components that have been implemented include the 2-dimensional inverse discrete cosine transform, inverse scalar quantizer and the parallel Huffman decoder. Parallelism and pipelining were fully exploited in the design to achieve the high frame rate.

Zulfakar Aspar

Papers

Parallel Huffman decoder with an optimized look up table option on FPGA

Analysis of the wavelet-based image difference algorithm for PCB inspection

Performance evaluation of wavelet-based PCB defect detection and localization algorithm

Implementation of two dimensional forward DCT and inverse DCT using FPGA

Field programmable gate array (FPGA) based baseline JPEG decoder