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Showing papers by "Actel published in 2013"


Patent
02 Jul 2013
TL;DR: In this paper, an integrated programmable logic circuit having a read/write probe includes an address circuit for selecting one of the internal circuit nodes, a read-probe enable line for selectively coupling the selected internal node to the probe-data line, a data input path to the asynchronous data input line of each flip flop, and selection circuitry, responsive to the address circuit and the writeprobe enabling line.
Abstract: An integrated programmable logic circuit having a read/write probe includes a plurality of programmable logic circuits having internal circuit nodes and a plurality of flip flops, each having an asynchronous data input line, an asynchronous load line, and a data output connected to an internal circuit node, a probe-data line, an address circuit for selecting one of the internal circuit nodes, a read-probe enable line for selectively coupling the selected one of the internal circuit nodes to the probe-data line, a data input path to the asynchronous data input line of each flip flop, a write-probe data input path to the asynchronous data input line of each flip flop, a write-probe enable line, and selection circuitry, responsive to the address circuit and the write-probe enable line, to couple one of the data input path and the write-probe data input path to the asynchronous data input of a selected flip flop.

9 citations