Showing papers by "Yeshwantrao Chavan College of Engineering published in 2012"
13 Sep 2012
TL;DR: The proposed method is found indeed more efficient and robust in improving the step response of DC motor drive system and had superior features, including easy implementation, stable convergence characteristic, and good computational efficiency.
Abstract: This paper present a method to determine the optimal tuning of the PI controller parameter on Direct current (DC) motor drive system using particle swarm optimization (PSO) algorithm, Ziegler-Nichols (ZN) tuning and Modified Ziegler-Nichols (MZN) tuning method. The main objective of this paper is to minimize transient response specifications chosen as rise time, settling time and overshoot, for better speed response of DC motor drive. The speed control of DC motor is done using PI and PID controllers. Implementation of PID controller for DC motor speed control is done using ZN and MZN tuning method. For PSO algorithm technique, PI controller is used to improve the performance of DC motor speed control system. A comparison is made on the basis of objective function (rise time, settling time and overshoot) from output Step responses. The proposed approach had superior features, including easy implementation, stable convergence characteristic, and good computational efficiency. Fast tuning of optimum PI controller parameters yields high-quality solution. Compared with traditional ZN method and MZN method, the proposed method is found indeed more efficient and robust in improving the step response of DC motor drive system.
100 citations
TL;DR: In this paper, a case study of two potential sites namely Shahnoor and Purna in Vidarbha region of Maharashtra State in India is presented, where the hydrological data of a potential site for nearly sixty years is obtained and is thoroughly studied for possible development of mini hydro power plant.
Abstract: Mini-Hydro power generation could be planned on small-scale on existing small rivers, canals etc. as it could be beneficial in utilization of all existing water reservoirs and streams so as to generate hydro power which is renewable in nature. By this, they do not encounter the problems of rehabilitation of people and environmental problems associated with the large hydro power plants. This paper presents the case study of two potential sites namely Shahnoor and Purna in Vidarbha region of Maharashtra State in India. Here, the hydrological data of a potential site for nearly sixty years is obtained and is thoroughly studied for possible development of mini hydro power plant. The basic parameters those are to be included in feasibility report which is to be prepared for every proposed hydroelectric project are also mentioned. This paper could be well utilized for planning and irrigating land in and around rural areas.
58 citations
Proceedings Article•
30 Mar 2012TL;DR: This paper provides synthesizing reversible counter which is the new approach in designing four bit reversible asynchronous sequential circuit and proposed a reversible D flip-flop and Tflip-Flop.
Abstract: The reversible logic design in today's era is attracting more interest due to its low power consumption. Reversible logic has growing importantance in low-power circuit design and high processing computing. This paper provides synthesizing reversible counter which is the new approach in designing four bit reversible asynchronous sequential circuit. This paper also proposed a reversible D flip-flop and Tflip-flop. The important reversible gates used for reversible logic synthesis are Feynman gate, Fredkin gate, TSG gate and sayem gate etc. This paper presents a basic reversible gate to build more complicated circuits. The transistorized implementation of reversible gate presented in this paper are completely reversible in nature i.e. it can perform both forward and backward computation.
20 citations
16 Dec 2012
TL;DR: A new algorithm for the segmentation of brain MR images, using intuitionistic fuzzy clustering (IFCM), is proposed in this paper and the quantitative evaluation demonstrates the superiority of the proposed algorithm.
Abstract: A new algorithm for the segmentation of brain MR images, using intuitionistic fuzzy clustering (IFCM), is proposed in this paper. The algorithm uses intuitionistic fuzzy representation of image to deal with variations in pixel intensities of brain MR images. The proposed intuitionistic fuzzy clustering algorithms segments brain MR image into three regions, gray matter (GM), white Matter (WM) cerebrospinal fluid (CSF). To evaluate the performance of the proposed method, segmentations results are compared on the basis of segmentation accuracy and computational time with bias corrected fuzzy clustering method (BCFCM). The quantitative evaluation demonstrates the superiority of the proposed algorithm.
19 citations
11 May 2012
TL;DR: An adaptive template matching and feature extraction using curvelet transform for the recognition of numerals and the advantage of this approach is it gets the best of the two results at its output.
Abstract: In recent years research towards number recognition is getting increasing attention. Many approaches have been proposed by the researchers towards number recognition and many recognition systems for numerals are available in the literature. In this paper we propose an adaptive template matching and feature extraction using curve let transform for the recognition of numerals. The advantage of our approach is we get the best of the two results at its output.
8 citations
01 Dec 2012
TL;DR: In this paper, the authors evaluated the capacity of micro hydropower plants (MHPPs) and the expected value of the annual power generation of the MHPPs, the duration curve is then plotted.
Abstract: Energy generation is one of the major key factors for economic and social development in all the developed and developing nations of the world. Adequate amount of energy generation in a sustainable manner is a major challenge in the present energy scenario. Fast depleting fossils fuels and their environmental effects forces to look towards renewable sources for sustainable development. Micro hydropower plants are emerging as a major renewable energy resource today as they do not encounter the problems of population displacement and environmental problems associated with the large hydro power plants. Hydro power plants convert potential energy of water into electricity. The water after generating electrical power is available for irrigation and other purposes. In this paper the work is carried out for evaluating Micro hydro power plants (MHPP) generation availability that can be applied to generation systems reliability and to generation planning studies. It considers the uncertainties of rivers inflows and generation unit operation. While calculating the capacity of power plant to be installed at these sites, it is assumed that there will be water reservation for irrigation and other application also. The expected value of the annual power generation of the MHPP, the duration curve is then plotted.
7 citations
15 Mar 2012
TL;DR: The novel 3-2, 4-2 and 5-2 compressors are illustrated for efficient design, which are used as the basic building blocks for the proposed binary to residue converter designs.
Abstract: In this paper, a binary to residue number system architecture based on the 2k−1 modulo set. For the integer modulo operation (X mod m), (p, 2) compressors are used, where m is restricted to the values 2k−1, for any value of k > 1 and X is a 16 bit number. The novel 3-2, 4-2 and 5-2 compressors are illustrated for efficient design, which are used as the basic building blocks for the proposed binary to residue converter designs. The 3-2, 4-2 and 5-2 compressors are used in place of half adder and full adder to reduce the delay, power consumption as well as the area of the circuit. The 4-2 and 5-2 compressors cell can operate reliably in any tree structured parallel multiplier at very low supply voltages. The proposed converter can be implemented by fast and simple architecture and also required less hardware.
6 citations
16 May 2012
TL;DR: In this paper, the authors proposed a balancing method of sub-module capacitor voltage of modular multilevel converter (MMC) in one of the applications, HVDC power transmission.
Abstract: The proposed balancing method [10] of sub-module capacitor voltage of modular multilevel converter (MMC) in this paper is applied to one of the applications, HVDC power transmission i.e. MMC-VSC-HVDC. One of the control strategies of MMC-VSC-HVDC i.e. direct control strategy has been comprehensively simulated to prove the effectiveness and versatility of balancing method. To prove the robustness of the balancing method, the variation of the parameters such as active and reactive power is made to around 0.5pu on positive as well as negative sides. The simulation is done in MATLAB software.
5 citations
01 Dec 2012
TL;DR: Flash ADC is Implemented in 0.18 μm technology using CMOS Inverter based Threshold inverter Quantized (TIQ) comparator for effective speed and power improvement by eliminating complete resistive ladder circuit.
Abstract: In this paper Flash ADC (FADC) is Implemented in 0.18 µm technology using CMOS Inverter based Threshold inverter Quantized (TIQ) comparator for effective speed and power improvement by eliminating complete resistive ladder circuit. Thermometer to binary decoder with low power consumption, less area & short critical path is selected for the design of low power high speed FADC. Presence of bubble error reduces output correction capability. An advanced scheme is proposed for correction of bubble error in Mux based decoder. FADC comparators designed with systematic sizing of transistors where linearity measures of convertor include 0.42 LSB INL, +0.62/−0.75 LSB DNL and ENOB 3.09 at 20MHz.
4 citations
31 Aug 2012
TL;DR: In this article, the performance of group (subchannel) allocation criteria employed in downlink transmission, which results in throughput maximization, is evaluated, and the modified technique of sub channel allocation is given.
Abstract: The Multi-Carrier Code Division Multiple Access (MC-CDMA) is becoming a very significant downlink multiple access technique for high-rate data transmission in the fourth generation wireless communication systems. By means of efficient resource allocation higher data rate i.e. throughput can be achieved. This paper evaluates the performance of group (subchannel) allocation criteria employed in downlink transmission, which results in throughput maximization. Proposed algorithm gives the modified technique of sub channel allocation in the downlink transmission of MC-CDMA systems. Simulation are carried out for all the three combining schemes, results shows that for the given power and BER proposed algorithm comparatively gives far better results .
3 citations
01 Jan 2012
TL;DR: In this paper, an automated moving Fixture for Banjo Beam or Case Axle cleaning machine is taken from the special purpose machine in which different 17 types of components are to be cleaned,dry, and proceed for painting in continuous production line of Automotive Industry that is Manufacturer of Case axle Since the machine is to be made for the 17 different type of components and each component is of different shape and sizes.
Abstract: Automated moving Fixture for Banjo Beam or Case Axle cleaning machine is taken from the special purpose machine in which Different 17 types of components are to be cleaned ,dry, and proceed for painting in continuous production line of Automotive Industry that is Manufacturer of Case axle Since the machine is to be made for the 17 different type of components and each component is of different shape and sizes. Components are taken by considering similar standard automotive components which are universally used. The system is made for multistage processing with well defined process and operation for the decided cycle time. This system is the conveyorised Fixture for Banjo Beam along with component will be get stoppage at every station by provided sensors, Operation cycle is run through PLC Programme
01 Jul 2012
TL;DR: A novel architecture for Radix-10 decimal multiplier is introduced and it significantly improves the area and latency of the previous design, which include: optimized digit recoders, decimal carry-save adders (CSA’s) combining different decimal-coded operands, and carry free adders implemented by special designed bit counters.
Abstract: This paper introduces novel architecture for Radix-10 decimal multiplier. The new generation of highperformance decimal floating-point units (DFUs) is demanding efficient implementations of parallel decimal multiplier. The parallel generation of partial products is performed using signed-digit radix-10 recoding of the multiplier and a simplified set of multiplicand multiples. The reduction of partial products is implemented in a tree structure based on a new algorithm decimal multioperand carry-save addition that uses a unconventional decimal-coded number systems. We further detail these techniques and it significantly improves the area and latency of the previous design, which include: optimized digit recoders, decimal carry-save adders (CSA’s) combining different decimal-coded operands, and carry free adders implemented by special designed bit counters. Keywords— Decimal computer arithmetic, parallel decimal multiplication, partial product generation and reduction, Decimal carry-save addition.
02 Jan 2012
TL;DR: Better discrimination and low design implementation complexity of the cosine-modulated wavelets has been effectively utilized to give better features and more accurate classification results.
Abstract: This paper presents technique for the classification of the MRI images of human brain using cosine modulated wavelet transform Better discrimination and low design implementation complexity of the cosine-modulated wavelets has been effectively utilized to give better features and more accurate classification results The proposed technique consists of two stages, namely, feature extraction, and classification In the first stage, the energy features from MRI images are obtained from sub-band images obtained after decomposition using cosine modulated wavelet transform In the classification stage, Bays classifier is used to classify the image as normal or abnormal Average Classification accuracy with a success rate of 100% has been obtained
01 Dec 2012
TL;DR: In this article, the design details of mini-hydro project including all its aspects like designed head, designed discharge, machine ratings, power house dimensions etc are presented for planning and irrigating land in and around rural areas.
Abstract: Hydro power generation can be planned on small scale on existing small rivers, canals, weirs etc. Government has declared revised policy for development of small hydro power up to 25MW capacity through private sector participation. Hydro power project on canal water can be planned under Independent Power Producers Policy and developed as independent power generation plant. Various basic parameters like selection of site, hydrological and topographical survey and its analysis is explained for deciding he capacity of plant. For this Hydrological data of the river should be available with satisfactory water flow. Various graphs and flow duration curves are plotted for a typical river data. The basic parameters to be included in feasibility report which is to be prepared for every proposed hydroelectric project are also mentioned. The most important aspect of environment is also stated so that the project does not have any negative impact on environment and ecology. This paper can be well utilized for planning and irrigating land in and around rural areas. This paper presents the design details of mini hydro project including all its aspects like designed head, designed discharge, machine ratings, power house dimensions etc.
11 May 2012
TL;DR: An efficient architecture based on pre-computation for Viterbi decoders incorporating T-algorithm is proposed, which greatly shortens the long critical path introduced by the conventional T-Algorithm.
Abstract: In this paper, we propose an efficient architecture based on pre-computation for Viterbi decoders incorporating T-algorithm. Through optimization at both algorithm level and architecture level, the new architecture greatly shortens the long critical path introduced by the conventional T-algorithm. The design example provided in this work demonstrates more than twice improvement in clock speed with negligible computation overhead while maintaining decoding performance.
21 Mar 2012
TL;DR: In this paper, the authors presented a new methodology for design of high speed CMOS operational amplifier in Sub-micron region, which uses a compensation technique which increases the unity gain frequency and phase margin simultaneously.
Abstract: This paper presents a new methodology for design of high speed CMOS operational amplifier in Sub-micron region. The op-amp uses a compensation technique which increases the unity gain frequency and phase margin simultaneously. The CMOS op-amp presented in this paper works on 1.5V designed in 65nm standard CMOS technology. It exhibits 86dB DC gain. With load of 5pF, the unity gain frequency and phase margin are 34MHz and 84° respectively. The op-amp is fairly small and slew rate is more than other low power low voltage op-amps reported. This op-amp is then simulated for application in peak detector.
01 Jan 2012
TL;DR: It is shown that the power dissipation in adiabatic inverters is less as compared to CMOS inverter, which is a new method of reducing the energy dissipation.
Abstract: This paper proposes a new method of reducing the energy dissipation. Adiabatic logic style is proving to be an attractive solution for low power digital design. Many researchers have introduced different adiabatic logic styles in last few years and proved that these are better than CMOS. Adiabatic switching technique based on energy recovery principle is one of the innovative solutions at circuit and logic level to achieve reduction in power dissipation This paper mainly consist of implementation of Adiabatic amplifier and Basic Adiabatic inverters (ECRL,CAL,CPAL).Its comparative power analysis with conventional CMOS inverter is carried out. In this paper, we show that the power dissipation in adiabatic inverters is less as compared to CMOS inverter. All circuits are implemented using Chartered 0.35μm CMOS technology Tanner EDA 13.0 tool.
01 Dec 2012
TL;DR: In this paper, an intelligent, unsupervised organizing neural network based, high power amplifier (HPA) characteristics independent, adaptive method for compensation of nonlinear distortions for orthogonal frequency division multiplexing (OFDM) based wireless communication system is presented.
Abstract: Our novel work presents an intelligent, unsupervised organizing neural network based, high power amplifier (HPA) characteristics independent, adaptive method for compensation of nonlinear distortions for orthogonal frequency division multiplexing (OFDM) based wireless communication system Major elements that contribute to multipath fading effects, like Doppler Effect, interference effects, phase noise and frequency offset are also considered and to account for major degradation categories, Rayleigh and Rician channel models are considered in an OFDM system Two unsupervised neural networks used are self organizing feature map (SOFM) and parameter-less self organizing map (PLSOM) System performance is tested for OFDM system with and without neural block and it is proved through spectral regrowth as well as bit error rate (BER) plots that the proposed model brings an overall improvement in OFDM system in highly dispersive environment
Posted Content•
TL;DR: Evaluating the performance of criteria used for group (subchannel) allocation employed in downlink transmission of MC-CDMA systems shows that for the given power and BER proposed algorithm comparatively gives far better results.
Abstract: The Multi-Carrier Code Division Multiple Access (MC-CDMA) is becoming a very significant downlink multiple access technique for high-rate data transmission in the fourth generation wireless communication systems. By means of efficient resource allocation higher data rate i.e. throughput can be achieved. This paper evaluates the performance of criteria used for group (subchannel) allocation employed in downlink transmission, which results in throughput maximization. Proposed algorithm gives the modified technique of sub channel allocation in the downlink transmission of MC-CDMA systems. Simulation are carried out for all the three combining schemes, results shows that for the given power and BER proposed algorithm comparatively gives far better results