Showing papers by "Zoran Corporation published in 1991"

Architecture for integrated concurrent vector signal processor

Abstract: Multiple special purpose processing units are provided in a vector signal processor for concurrent, parallel processing, particularly of complex vectors. The principal processing units are an execution unit, a data movement unit, a control/register unit, a vector buffer unit, an instruction fetch unit, and a bus interface unit.

Bus arbitration and resource management for concurrent vector signal processor architecture

Abstract: A concurrent vector signal processor includes a resource manager for utilization of captive signal processing resources. The first instructions in a temporary instruction queue are predecoded and the signal processing resources are selected to execute those first instructions. Arbitration system is provided for external buses connected to a concurrent vector signal processor. A processor arbiter supervises on a priority basis both captive processor resources and independent processor resources. A bus arbiter supervises on a priority basis external and internal buses.