10 – Cache Memories for PDP-11 Family Computers

TLDR: This chapter focuses on cache memories for PDP-11 family computers, a small, fast, associative memory located between the central processor Pc and the primary memory Mp.

Abstract: Publisher Summary This chapter focuses on cache memories for PDP-11 family computers. One of the most important concepts in computer systems is that of a memory hierarchy. A memory hierarchy is simply a memory system built of two (or more) memory technologies. A cache memory is a small, fast, associative memory located between the central processor Pc and the primary memory Mp. Typically, the cache is implemented in bipolar technology, while Mp is implemented in MOS or magnetic core technology. The cache stores the address data AD pairs, consisting of an Mp address, and a copy of the contents of the Mp location corresponding to that address. The most common form of cache organization is fully associative with the data portion of the AD pair corresponding to basic addressable unit of memory. In a fully associative cache, any AD pair can be stored in any cache location. A set associative cache consists of a number of sets, which are accessed by indexing rather than by association. Each of the sets contains one or more AD pairs. The performance goals of the PDP-11/70 computer system require the typical miss ratio to be 0.1 or less.