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Patent

Automatic gain control system

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Abstract
A digital automatic gain control system for maintaining a constant output level through attenuating or amplifying an input signal is disclosed. The system includes a gain control providing an output signal by amplifying or attenuating an input signal in a step mode in response to digital data of a data bus, a comparator deciding with a digital output whether or not said output signal is within a window reference voltage range, a stage preventing a malfunction due to noise by means of performing a counting operation upon receiving said digital output, a clock generating a clock pulse and dividing the frequency of the clock pulse, whereby there is provided a divided clock in case of performing an up counting operation and to the contrary there is provided the non-divided clock pulse in case of performing a down counting operation, and generating a reset clock delayed by a specified time interval from said clock, a latch adapted to receive and thereby latch an output of preventing stage malfunction, and reset clock and up/down counting and logic performing the up or down counting operation by receiving said clock and a latch signal.

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Citations
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TL;DR: In this article, a direct conversion receiver with a tri-phase architecture including three separate baseband signal channels is described. But the work is limited to a single-input single-output (SISO) channel.
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References
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Automatic gain controlled amplifier apparatus

TL;DR: In this paper, a discretely variable gain amplifier is used in which a series of programmed predetermined ranges are sequentially tested against the capability of the A/D converter in relation to the particular input analog signal.
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Digital signal gain control circuitry for varying digital signals in substantially equal db steps

TL;DR: In this article, a volume control or amplitude varying system for digital signals includes a cascade connection of a coarse multiplier/divider for changing the values of digital signals in 6 db steps and a fine multiplier/Divider for computing digital values logarithmically in substantially equal steps of less than 6 db per step.
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TL;DR: In this article, an arithmetic circuit operates in response to the output of the decoder to increase or decrease the volume data according to the up and down instruction signals, and the attenuation or amplification of the input signal is established accordingly.
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TL;DR: An automatic graphic equalizer for a sound system has circuitry for measuring the effect of the physical environment receiving a sound on the frequency characteristics of the sound, and for adjusting the characteristics of a graphic equaliser to compensate for distortions in the desired flat frequency response caused by the physical environments as mentioned in this paper.
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Line equalizer having pulse-width deviation detector for compensating long-term level variations

TL;DR: In this paper, a variable gain amplifier is connected in series with the frequency equalizer for amplifying the pulse signal with a gain variable as a function of the control signal to compensate for long-term level variations.