Patent
Circuit to prevent a transformer from presenting a low impedance upon core saturation
Centala John P,Lane Royce W +1 more
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TLDR
In this article, an externally driven saturating transformer inverter is provided with an auxiliary commutating transformer whose windings are connected with those of a power transformer and diode members such that upon saturation of the power transformer core, a high-reflected load impedance is presented.Abstract:
An externally driven saturating transformer inverter is provided with an auxiliary commutating transformer whose windings are connected with those of a power transformer and diode members such that upon saturation of the power transformer core, a high-reflected load impedance is presented. High-current spike generation is obviated while the regulation advantages of pulse width modulation is retained.read more
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Patent
Square wave generator
TL;DR: In this article, the advantages of current controlled and voltage controlled generators are combined by the provision of two output transformers whose primary windings are connected in parallel through diodes (D5 and D6), which in case of overloading are blocked by the voltage of a capacitor which itself is connected through a diode which is also blocked by said voltage.
Patent
Replica driver transformer for inverter circuit
TL;DR: In this paper, a replica driver transformer is used to saturate before the power transformer to save the drive to the power switching transistors and save them from burnout which might otherwise be caused by power transformer saturation.
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Patent
Current limiting inverter circuits and apparatus for operating electric discharge lamps and other loads
TL;DR: An inverting device for operating an electric discharge lamp with an alternate potential comprising: a pair of input conductors for circuit connection with a DC supply means, a first and a second semiconductor device capable of operating between a state of high impedance and a low impedance state, said first semiconductor switching device being connected in circuit with said first input conductor, said second SVM being connected with the other of said input conductor.