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Patent

CMOS Latch-up protection circuit

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TLDR
In this paper, a protection circuit for bulk-silicon CMOS circuits detects the latch-up of parasitic SCR devices, current starves the CMOS circuit in response to detecting a SCR latch up condition and reenables normal circuit operation once the latchup condition has been terminated.
Abstract
A protection circuit for bulk-silicon CMOS circuits detects the latch-up of parasitic SCR devices, current starves the CMOS circuit in response to detecting a SCR latch-up condition and reenables normal circuit operation once the latch-up condition has been terminated.

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Memory card with latch-up protection

TL;DR: A memory card with a memory element utilizing a CMOS type electric field effect transistor comprises an overcurrent detecting device for detecting the size of current flowing through a power source circuit as discussed by the authors.
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Method and apparatus of reducing latch-up susceptibility in CMOS integrated circuits

TL;DR: In this article, a method and apparatus for controlling latch-up in a CMOS circuit senses a power supply transition, clamps the substrate to ground in response to sensing a power-supply transition, and releases the clamp after the power- supply transition.
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Integrated circuit protection circuit

TL;DR: An integrated circuit protection device for use with a voltage regulator used to drive an integrated circuit to prevent damage to the integrated circuit which goes into a "latch up" condition is described in this article.
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CMOS Turn-on circuit

TL;DR: In this paper, an FET which has its source-drain circuit connected between the lower voltage terminal of the integrated circuit and lower voltage source, and its gate to the higher voltage source is presented.
References
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Patent

Fast acting circuitry for dc overload protection

E Geiger
TL;DR: In this paper, an improved overload protection circuit is associated with a DC load having a first output whose voltage level exhibits a significant decrease in the presence of a short circuit in the load.