A DC level control circuit wherein the DC level of an input signal is compared to a reference level and a DC bias potential is varied in accordance with said comparison, the varied bias potential being fed back to correspondingly vary the DC level input signal.

A variable speed drive (VSD) having a rectifier, an inverter, an inverter modulator, an inverter controller, and a control loop, for controlling a motor load, wherein the control loop reduces an amount of power transferred to the inverter during a voltage sag. The control loop may include a reference generator, a filter, a regulator, and a ride-through corrective algorithm. A method for controlling a VSD to improve voltage sag ride-through by monitoring a voltage applied to the VSD, generating a control signal representative of losses in a motor load when a voltage sag is detected in the voltage applied to the VSD and applying less power to the load of the inverter.

DC level control circuit

Control loop and method for variable speed drive ride-through capability improvement

Brightness control apparatus for a video signal image reproducing system including a video signal processing channel, a source of reference voltage for establishing a desired level of image brightness, and a keyed comparator circuit. The comparator forms a closed control loop with the signal processing channel, and is keyed during periodic blanking intervals of the video signal to sense the magnitude of the reference voltage and a brightness representative blanking level of the video signal which may vary undesirably. The comparator provides an output control signal indicative of a voltage difference between the reference voltage and the blanking level. The control voltage is applied to the signal channel for translating the blanking level in a direction to minimize the voltage difference, so that a desired relationship between the reference voltage and the blanking level is preserved.

Brightness control circuit employing a closed control loop

A video signal processing circuit is disclosed which has a wave-forming circuit for setting the level of an input video signal to a predetermined first DC level, which is higher than the pedestal level of the input video signal, at least during the blanking period of the input video signal, and producing a wave-formed signal; a peak-hold circuit for detecting and holding the level of the darkest peak of the wave-formed signal and producing a peak-hold output signal; and a black level control circuit controlled by the peak-hold output signal for controlling the DC level of the input video signal so that the darkest level of the input video signal coincides with a predetermined second DC level

Video signal processing circuit

A system for calibration and closed loop feedback control of image signals from charge coupled imaging devices (CCDs) (16). During periodic calibration, sampling the output of dark reference cells on a CCD nets an initial D.C. restoration voltage (black) level. Next, a black reference strip is scanned and, an offset value is determined and an offset voltage is added to the D.C. restoration (black) level. During each scan line of regular scanning, dark cells are sampled and produce a voltage that is modified by the offset voltage that was determined during calibration.

Automatic d.c. offset control for image scanners.

An encrypted video distribution system includes a signal- originating head end for scrambling outgoing television program-bearing signals. In particular, the video content of selected lines is inverted about a reference voltage level, and the inversion reference level amplitude transmitted in pulse form during the horizontal synchronizing pulse interval. Line video inversion/non-inversion is controlled by a keyed pseudo random generator. At each authorized subscriber location, all inverted lines are restored to proper format, using the accompanying received inversion amplitude level present during horizontal sync as a reference. A pseudo random generator is included in the receiver descrambling circuitry and operates in a sequence identical to the like circuit atthe head end to identify those lines requiring video inversion.

Video encryption system

D.c. restoration in amplifiers

There is described a transistorized direct-coupled amplifier circuit which receives a composite video color signal, amplifies the signal and at the same time establishes a fixed DC level for the sync tips and slices the ''''white'''' peaks of the video signal at a predetermined level. The amplifier includes a feedback loop which includes a sync tip detector with a relatively long time constant on the output for controlling the DC operating point of the direct coupled amplifier. The amplifier exhibits good linearity up to its predetermined signal level, after which the output remains substantially constant as the signal increases beyond this level.