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Proceedings ArticleDOI

Deadlock-free adaptive routing algorithms for multicomputers: evaluation of a new algorithm

J. Duato
- pp 840-847
TLDR
A new adaptive routing algorithm is evaluated under different load conditions and compared with other algorithms, showing that the new design methodology supplies faster routing algorithms, at least for those networks with a high connectivity.
Abstract
A new theory for the design of deadlock-free adaptive routing algorithms for wormhole and store-and-forward routing as well as two design methodologies have been proposed previously. In this paper, a new adaptive routing algorithm, obtained from the application of the former theory to the binary n-cube, is evaluated under different load conditions and compared with other algorithms. The results show that the new design methodology supplies faster routing algorithms, at least for those networks with a high connectivity. >

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Citations
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Journal ArticleDOI

A new theory of deadlock-free adaptive routing in wormhole networks

TL;DR: The theoretical background for the design of deadlock-free adaptive routing algorithms for wormhole networks is developed and some basic definitions and two theorems are proposed, which create the conditions to verify that an adaptive algorithm is deadlocks-free, even when there are cycles in the channel dependency graph.
Book

Interconnection Networks

TL;DR: The authors present in a structured way the basic underlying concepts of most interconnection networks and provide representative solutions that have been implemented in the industry or proposed in the research literature.
Journal ArticleDOI

A necessary and sufficient condition for deadlock-free adaptive routing in wormhole networks

TL;DR: This paper proposes a necessary and sufficient condition for deadlock-free adaptive routing, the key for the design of fully adaptive routing algorithms with minimum restrictions, and shows the application of the new theory.
Proceedings ArticleDOI

A Necessary and Sufficient Condition for Deadlock-Free Adaptive Routing in Wormhole Networks

TL;DR: A partially adaptive routing algorithm for k-ary n-cubes which doubles the throughput without increasing the hardware complexity significantly and is the key for the design of maximally adaptive routing algorithms with minimum restrictions.
Proceedings ArticleDOI

k-ary n-trees: high performance networks for massively parallel architectures

TL;DR: The experimental results show that the uniform, bit reversal and transpose traffic patterns are very sensitive to the flow control strategy, and complement traffic reaches an optimal performance, with a saturation point at 97% of the capacity for all flow control strategies.
References
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Journal ArticleDOI

Deadlock-Free Message Routing in Multiprocessor Interconnection Networks

TL;DR: In this article, a deadlock-free routing algorithm for arbitrary interconnection networks using the concept of virtual channels is presented, where the necessary and sufficient condition for deadlock free routing is the absence of cycles in a channel dependency graph.
Book

Deadlock-free message routing in multiprocessor interconnection networks

TL;DR: A deadlock-free routing algorithm can be generated for arbitrary interconnection networks using the concept of virtual channels, which is used to develop deadlocked routing algorithms for k-ary n-cubes, for cube-connected cycles, and for shuffle-exchange networks.
Journal ArticleDOI

The Torus Routing Chip

TL;DR: The torus routing chip (TRC) is a selftimed chip that performs deadlock-free cut-through routing ink-aryn-cube multiprocessor interconnection networks using a new method of deadlock avoidance called virtual channels.
Journal ArticleDOI

Multicomputers: message-passing concurrent computers

TL;DR: A status report on the architecture and programming of a family of concurrent computers that are organized as ensembles of small programmable computers called nodes, connected by a message-passing network, each with its own private memory is provided in this article.
Proceedings ArticleDOI

iWarp: an integrated solution to high-speed parallel computing

TL;DR: Because of their strong computation and communication capabilities, the iWarp components provide a versatile building block for high-performance parallel systems ranging from special-purpose systolic arrays to general-purpose distributed memory computers.
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