Design of a 3.2 mW Differential Ring VCO with Wide Tuning-Range using Self Biased Active Inductor Topology in 180 nm CMOS process

TLDR: In this article , a four-stage ring VCO architecture with a new differential delay stage utilizes the dual delay path scheme to achieve high oscillation frequency, low power dissipation, and low phase noise.

Abstract: Abstract This paper reports a design of the most significant electronic circuit used in modern wireless and optical communications systems, known as voltage-controlled oscillator (VCO). A variable delay stage is a core element of ring VCO and in this work, a new differential delay stage based on the inductive shunt peaking technique using active inductors (AI) is presented to increase the ring VCO’s frequency bandwidth. The presented four-stage ring VCO architecture with a new differential delay stage utilizes the dual delay path scheme to achieve high oscillation frequency, low power dissipation, and low phase noise. The proposed VCO circuit is designed and simulated in a 180 nm TSMC CMOS process and 1.8 V supply voltage ( V dd ). The VCO generates an output frequency range from 2.876 GHz to 2.039 GHz (34.05%) for 0 V to 1 V variation in control voltage ( V c ). The designed VCO circuit's power dissipation ranges from 3.289 mW to 2.888 mW, and its phase-noise at 1 MHz offset frequency is -108.9 dBc/Hz. The VCO exhibits figure of merit is -171.9 dBc/Hz and a layout area of 1148.67 µm 2 .