Patent
Fault detection circuit
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TLDR
In this article, a flip flop (FF) of which status value is inverted at every clock to the register circuit and forming a comparator for comparing the values of respective FFs in plural register circuits is presented.Abstract:
PURPOSE:To detect a fault such as the stop of a whole register circuit, i.e. a fault in a clock distribution circuit, by adding a flip flop (FF) of which status value is inverted at every clock to the register circuit and forming a comparator for comparing the values of respective FFs in plural register circuits. CONSTITUTION:If it is supposed that a clock signal line 20 is failed, the operation of a register circuit 1 is stopped because of no supply of clocks and an operation display signal 30 outputted from an operation display FF 10 becomes a fixed value. On the other hand, register circuits 2, 3 are independent of said fault and continue normal operation, so that their operation display signal are continuously inverted at every generation of a clock. Thereby, the comparator 4 can detect the discrepancy of input signals at every two clocks and inform the fault in any one of the registers 1-3 to an external circuit through an output terminal 43. When any one bit of an output from clock signal lines 21, 22 or a clock distributing circuit 13 is failed, similar operation is executed.read more
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