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Patent

High-speed processing module for paper disease image data

TLDR
In this article, a paper flaw image data high speed process module consisting of a camera link interface, an FPGA chip, a memory chip SRAM, a FLASH chip, an Ethernet chip and an Ethernet interface was proposed.
Abstract
The utility model relates to a paper flaw image data high speed process module which comprises a Camera Link interface, an FPGA chip, a memory chip SRAM, a FLASH chip, an Ethernet chip and an Ethernet interface, wherein the Camera Link interface and the FPGA chip are connected, the FPGA chip is connected to the Camera Link interface and the memory chip SRAM, the FPGA chip is connected to the FLASH chip and the Ethernet chip through a system bus, and the other end of the Ethernet chip is connected to the Ethernet interface. The utility model has the advantages that the paper flaw image data high speed process module employs the FPGA chip to carry out the calibration, quantification, analysis and packing of original image data collected by a CCD camera, the FPGA chip uses a hardware structure to achieve software effect and to simplify software programming, meanwhile, the circuit structure of the module is simplified. And all the processing flows are parallel production-line flow processes, thereby accelerating processing speed and realizing the real time detection of ex-factory paper.

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Patent

Multi-mode parallel video quality fault detection method and device

TL;DR: In this article, a multi-mode parallel video quality fault detection device and a corresponding method is presented, which consists of a video partitioning module, a black field detection module and a static frame detection module.
Patent

Message processing method and device

程传宁
TL;DR: In this paper, the business process of the message is completed in the chip of the received message, and the chip is sent to the output port to complete the output, and it is not required to maintain the Cache consistency between network chips.