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Patent

Horizontal oscillation circuit capable of changing frequency

TLDR
In this paper, a frequency detection circuit detects the frequency of a horizontal sync signal, and generates a mode switching signal corresponding to the detected frequency, and the oscillation modes of the voltage-controlled oscillator are switched in accordance with the frequency detection signal output from the frequency detector circuit.
Abstract
A frequency detection circuit detects the frequency of a horizontal sync signal, and generates a mode switching signal corresponding to the detected frequency. A voltage-controlled oscillator constituting a PLL circuit has a plurality of oscillation modes obtained by dividing a frequency equal to an integer multiple of the frequency of the horizontal sync signal into a plurality of frequency ranges, and oscillates signals in the respective frequency ranges in accordance with control voltages output from a filter. The oscillation modes of the voltage-controlled oscillator are switched in accordance with the mode switching signal output from the frequency detection circuit. In the voltage-controlled oscillator, since the frequency range in each oscillation mode is narrow, the oscillation gain can be suppressed low, and a deterioration in jitter characteristics can be prevented.

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Citations
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TL;DR: In this paper, a self-calibration unit is configured to iterate a test on a logic circuit in the integrated circuit at respectively lower supply voltage magnitudes until the test fails.
References
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Patent

Phase locked loop having plural selectable voltage controlled oscillators

TL;DR: In this paper, a phase detector, a filter, three VCO's (VCO1, VCO2, and VCO3), a multiplexer, and a frequency divider are presented.
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TL;DR: In this paper, a phase lock loop (PLL) circuit for controlling an oscillator includes a phase comparator, a loop filter, a reference converter and a feedback converter whose performance characteristics are dynamically controlled so as to provide a phase-locked output signal with both high frequency stepping resolution and low phase locking time.
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Synchronous digital detection of position error signal

TL;DR: In this paper, the authors present a digital representation of position error signals (PES) for direct application to a digital signal processor which controls overall servo positioning operations. But their work is limited to the detection of PES by employing a digital integrator which comprises a register and adder.
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TL;DR: In this article, a phase-locked loop was proposed to provide a precise 90° phase shift at the incoming NRZ data rate by using a series of differential inverters and controlling their delays in accordance with the corresponding delays of a ring oscillator that is part of a phaselocked loop.
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Digital voltage controlled oscillator having a ring oscillator with selectable output taps

TL;DR: In this article, a digital VCO consisting of a ring oscillator formed of a plurality of inverters connected in series, each inverter being capable of controlling its delay amount, a frequency controlling circuit for controlling the oscillation frequency of the ring oscillators to coincide with a reference frequency, a selector switch for selecting specified output taps from output taps, each thereof being provided for each of the plurality of in-series inverters, to take out the outputs therefrom, and switching control means for controlling outputs from which the outputs are taken out to be cyclically switched through the