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Patent

Offset adjustment circuit

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TLDR
An offset adjustment circuit for a differential amplifier includes a current source connected in series with a resistor for establishing a biasing voltage for a pair of field effect transistors (FETs) having variable resistors in their biasing circuits.
Abstract
An offset adjustment circuit for a differential amplifier includes a current source connected in series with a resistor for establishing a biasing voltage for a pair of field effect transistors (FET) having variable resistors in their biasing circuits. These FET's are connected to introduce currents respective connections between an input stage and a second stage of the differential amplifier. The difference of the currents supplied by the FET's divided by the transconductance of the input stage of the differential amplifier corresponds to an offset which remains fixed with changes in temperature. The offset introduced by the FET's, as determined by the adjusted values of the resistors in their biasing circuits, may be in opposition to the offset of the differential amplifier to either reduce it partially or completely, or it may be additive to the offset of the differential amplifier, as desired.

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Citations
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Trim correction circuit with temperature coefficient compensation

TL;DR: An op amp bias system that provides input offset voltage trim current with minimum offset thermal drift is described in this paper. But the bias system is not suitable for the use with a single bias generator.
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References
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Patent

Differential amplifier with means for balancing out offset terms

TL;DR: In this article, the collector currents of the first and second transistors can be selectively adjusted by adjusting the potentiometer of the wiper contact relative to the resistance element in a differential amplifier.