System and method for sampling an analog signal level

TLDR: In this article, a signal reconstruction controller is coupled to at least one analog-to-digital converter (ADC) (112 ) and to a phase adjustable clock source ( 108 ), where the ADC samples an electronic signal according to the sampling clock signal ( 116 ) to provide a digital representation of the electronic signal.

Abstract: A system includes a signal reconstruction controller ( 110 ) electrically coupled to at least one analog-to-digital converter (ADC) ( 112 ) and to a phase adjustable clock source ( 108 ). A sampling clock signal ( 116 ) is electrically coupled from the clock source ( 108 ) to the at least one ADC ( 112 ). The at least one ADC ( 112 ) samples an electronic signal according to the sampling clock signal ( 116 ) to provide a digital representation of the electronic signal. The controller ( 110 ) samples data from the ADC ( 112 ) at different sampling points in the electronic signal and determines the edges ( 140 ) of the electronic signal and the noisy samples ( 142, 144 ) that are away from the edges ( 140 ) of the electronic signal. By finding the least noisy sample ( 146, 148 ) that is away from the edges ( 140 ) of the electronic signal the controller ( 110 ) adjusts the phase of a sampling signal clock ( 116 ) to a sampling point that is the most reliable to sample the electronic signal to provide a digital representation thereof.