scispace - formally typeset
Patent

Systems, methods and apparatus for protein folding simulation

Reads0
Chats0
TLDR
Analog processors such as quantum processors are employed to predict the native structures of proteins based on a primary structure of a protein this paper, and a target graph may be created of sufficient size to permit embedding of all possible native multi-dimensional topologies of the protein.
Abstract
Analog processors such as quantum processors are employed to predict the native structures of proteins based on a primary structure of a protein. A target graph may be created of sufficient size to permit embedding of all possible native multi-dimensional topologies of the protein. At least one location in a target graph may be assigned to represent a respective amino acid forming the protein. An energy function is generated based assigned locations in the target graph. The energy function is mapped onto an analog processor, which is evolved from an initial state to a final state, the final state predicting a native structure of the protein.

read more

Citations
More filters
Patent

Quantum processor based systems and methods that minimize an objective function

TL;DR: In this paper, a quantum processor is used as a sample generator providing low-energy samples from a probability distribution with high probability, and the probability distribution is shaped to assign relative probabilities to samples based on their corresponding objective function values until the samples converge on a minimum for the objective function.
Patent

Systems and methods for improving the performance of a quantum processor by reducing errors

TL;DR: In this paper, techniques for improving the performance of a quantum processor are described, which employ improving the processor topology through design and fabrication, reducing intrinsic/control errors, reducing thermally assisted errors and methods of encoding problems in the quantum processor for error correction.
Patent

Systems and methods for improving the performance of a quantum processor to reduce intrinsic/control errors

TL;DR: In this article, the authors describe techniques for improving the performance of a quantum processor by reducing intrinsic/control errors by using quantum processor-wide problems specifically crafted to reveal errors so that corrections may be applied.
Patent

Double-masking technique for increasing fabrication yield in superconducting electronics

TL;DR: In this paper, a double-layer lithographic mask is used for partial anodization of the side-walls and base electrode of the Josephson junctions in superconducting integrated circuits.
Patent

Systems and methods for achieving orthogonal control of non-orthogonal qubit parameters

TL;DR: In this article, a hybrid qubit is formed by communicatively coupling a dedicated second qubit to a first qubit in order to achieve orthogonal control of non-orthogonal qubit parameters.
References
More filters
Patent

Analog processor comprising quantum devices

TL;DR: Analog processors for solving various computational problems are provided in this paper, where a plurality of quantum devices, arranged in a lattice, together with a number of coupling devices, are configured to couple next-neighbor quantum devices in the lattice.
Patent

Adiabatic quantum computation with superconducting qubits

TL;DR: In this article, a method for computing using a quantum system (1540) comprising a plurality of superconducting qubits is provided, in which the plurality of qubits are arranged with respect to one another, with a predetermined number of couplings between respective pairs of qubit pairs.
Patent

Coupling methods and architectures for information processing

TL;DR: In this paper, a structure comprising a first information device, a second information device and a first coupling element is presented, which couples the first lobe of the first device to the second lobe of a second device.
Patent

Superconducting quantum-bit device based on josephson junctions

TL;DR: A superconducting quantum-bit device based on Josephson junction has a charge as a first principal degree of freedom assigned to writing and a phase as a second principal degree for reading as mentioned in this paper.
Patent

Superconducting phase-charge qubits

TL;DR: A quantum computing structure comprising a superconducting phase-charge qubit, wherein the superconducitng loop with at least one Josephson junction is described in this paper. But it is not shown how to detect a charge of the phase charge qubit.