Showing papers on "Decimal published in 1982"

Fractal geometry derived from complex bases

Abstract: Each complex number can be expressed as a single number in positional notation using certain complex bases, just as the positive real numbers can be expressed as decimal expansions. These representations yield some intriguing geometric patterns in the complex plane, whose boundaries are fractal curves. One of these curves is known from the investigation of dragon curves; the others are new examples of fractals.

Elementary Axioms and Pictures for Infinitesimal Calculus

Abstract: is to conceive it as a system of real numbers given by decimal expansions or, more formally, as a complete ordered field. But it was not always so; prior to the formalisation of the real number concept in the late nineteenth century the number line was often considered to include infinitesimal quantities and their infinite reciprocals. It is this ambivalence which is at the heart of the new theory of nonstandard analysis and which can be exploited to give a satisfactory theory of infinitesimal calculus. Instead of one number line we must imagine two, a number system K of “constants” and a larger system K* of “quantities.” To the naked eye a pictorial representation of these would look the same, the number line of the picture above, but the number line K* contains infinitesimal detail and infinite structure not present in K.

The Basic Skills

Abstract: This chapter focuses on the number system The number system is a decimal system because it is based on 10 Any number can be written using the proper choice and combination of 10 symbols—0 through 9 The decimal system is a place value system This means that the value of each digit depends in part on its position within the number On moving to the left in a decimal number, each place is worth 10 times the previous place; on moving to the right, each place is worth one-tenth of the previous place A rounding variation that is found in other studies is the computer rule, which can avoid errors in rounding large series of numbers By means of this rule, some numbers may become larger while others become smaller The correct alignment of numbers around the decimal point is essential in successful addition To accomplish this, the numbers must be put in a column by lining up the decimal points and by filling in zeroes for any numbers with fewer decimal digits than the longest number

Circuit for storing a multi-digit decimal numerical value of the distance traversed by a vehicle

Abstract: A circuit for storing a multi-digit decimal numerical value of the distance traversed by a vehicle having a signal transmitter which gives off electric counting pulses, and particularly an electronic tachometer. The improvement consists of the numerical value being able to be stored by means for coding the numerical value in a one-step code for a non-volatile storage formed of floating-gate storage cells.

Binary-coded-decimal to binary converter

Abstract: A binary-coded-decimal to binary converter employs a selection network to which the binary coded decimal digits are applied, the digits being selected in pairs of increasing order of decimal denominational significance to be passed to the address lines of a pair of memory elements, the locations of which contain the binary terms equivalent to the decimal digits from which the particular location address is derived. In order to increase the effective utilization of the memory elements, the binary code components specifying at least one of the decimal digits are manipulated by the selection network, for example by conversion to complementary form, before being applied to the address lines. The notional capacity of the locations in terms of the number of binary denominations specifiable may be increased by separately generating bits of higher denominational significance, and this separate generation may take the form of a logic gating operation applied either to generate a binary term directly or to re-allocate the denominational significances of bit positions within a location.

Marking grid and method for a linear,decimal and ordered series,usable particularly for indexing pages of a printed work

Abstract: A surveying a linear decimal orderly series, used in particular for the identification of lines of text within the pages of a book printed. In the latter case, the process consists of matching the wafer (2) Book (1) of benchmarks willing following an original geometric law that allows to quickly find one of the benchmarks, and thus to open the book to the page Desired . The present invention also provides for to supplement the pages Molded grid by an index presented in an original form.

Applications of Redundant Number Representations to Decimal Arithmetic

Abstract: A decimal arithmetic unit is proposed for both integer and floating-point computations. To achieve comparable speed to a binary arithmetic unit, the decimal unit is based on a redundant number representation. With this representation no loss of compactness is made relative to binary coded decimal (BCD) form. In this paper the hardware required for the implementation of the basic operations of addition, subtraction, multiplication and division are described and the properties of floating-point arithmetic based on a redundant number representation are investigated.

Commodity storing location referencer indicator

Abstract: PURPOSE:To reduce man-power of code input and change of inputting mistake of a commodity storing location referencer indicator for plurally divided plural shelves, by using smaller figure numerical code in lieu of the item code number CONSTITUTION:Material name and storing location are coded, however, decimal 8 digit material code is substituted by decimal 4 digit Decimal 2 digit material code and storing location are stored by binary code in each address of the memory consists of 8 bits per word Under this condition, when a operator inputs material code eg ''12345678'', each stored material code in the range is successively read out, and if the input code coincide with the address of n+2-n+5, the memory stored in relation with the input code in address n, n+1 will be shown on the indicator

Mathematics for technical and vocational students

Abstract: 1. Whole Numbers. 2. Common Fractions. 3. Decimal Fractions. 4. Percentage. 5. Ratio and Proportion. 6. Practical Algebra. 7. Rectangles and Triangles. 8. Regular Polygons and Circles. 9. Solids. 10. Metric Measure. 11. Graphs. 12. Measuring Instruments. 13. Geometrical Constructions. 14. Logarithms. 15. Essentials of Trigonometry. 16. Strength of Materials. 17. Work and Power. 18. Tapers. 19. Speed Ratios of Pulleys and Gears. 20. Screw Threads. 21. Cutting Speed and Feed. 22. Gears. Appendix. Answers to Self-Tests. Answers to Odd-Numbered Problems. Index.

Representational error in binary and decimal numbering systems

Abstract: The representation of a general rational number of the form A/B as a floating point number requires a conversion from the general form to a base specific form. This conversion often results in the generation of infinitely repeating non-zero strings of digits which are truncated to the size of the mantissa resulting in a loss of precision. It is shown that the proportion of repeating versus finite rational numbers specific to a base is expotentially related to the number of unique prime factors of the base. Simulation results are presented which show the relative proportions of finite representations for binary and decimal cases over a range of mantissa sizes. The representation of rational numbers in computer systems is typically implemented by modified forms of scientific notations that are referred to as floating point representations. That is, all rational numbers in general fractional form are converted to a rational number of a default base and stored as a mantissa of fixed precision scaled by a power of the base. In this form the denominator need not be explicity represented or manipulated. This simplification limits the computational overhead and extends the range of the representation at the price of precision. Generally the normalization and base of such numbers are assumed to be a default understood by the algorithms which manipulate them. These systems of floating point representation can be grouped into P e r m i s s i o n to copy w i t h o u t f e e a l l o r p a r t o f t h i s m a t e r i a l i s g r a n t e d p r o v i d e d t h a t t h e c o p i e s are not made or d i s t r i b u t e d f o r d i r e c t c o m m e r c i a l a d v a n t a g e , t h e ACM c o p y r i g h t n o t i c e and the t i t l e o f t h e p u b l i c a t i o n and i t s d a t e appear , and n o t i c e i s g i v e n t h a t c o p y i n g i s by permission of the Association for Computing Machinery. To copy otherwise, or to republish, requires a fee and/or specific permission. 1982 ACM 0-89791-071-0/82/0400-0085 $00.75 three distinct categories: a binary mantissa and exponent a binary encodirg of decimal digits a binary encoding of a decimal mantissa Of these representations the first is a true base two scientific notation and has been the choice of the overwhelming majority of floating point systems. The remaining methods rely on only binary representation as a media for storage and representation of values. That is, their algorithms perform actual decimal manipulations. Therefore values represented in these methods are given binary encoding for rational numbers in decimal form. All of these representations require that rational numbers in fractional form be converted to a rational number in the appropriate base. To express a general rational number as a base-specific rational number requires conversion of the original fraction to a form in which the denominator is some power of the base of representation. For example, we typically convert the fraction 1/2 to 5/10 or its equivalent form . 5 to express it within a floating point representation. This power is saved as the "exponent" in floating point forms. The key problem in these systems of representation is that not all possible fractions (in fact a very limited subset) can be converted to a base specific representation with a finite numerator. For example, the rational number 1/3 (i/ii binary) cannot be represented in either decimal or binary systems with a finite numerator over a power of the base. Floating point systems of representation must therefore truncate the least significant digits of the numerator to fit within the finite size of the mantissa The result is a loss of significance and imprecision which is introduced into subsequent computations. It follows that this same phenomena (i.e. truncation of This work was funded in part by the Academic Grant Fund of Loyola University, New Orleans.

Numeric data input processing system by picture display device

Abstract: PURPOSE:To enable an unskilled keyboard operator to input numeric data easily and rapidly, by pointing one dot on a displayed linear picture with a light pen. CONSTITUTION:Numeric data is indicated with input equipment 2 such as a light pen. The input data fetch part 9 of an input analysis part 7 restores the indicated data to a decimal number consisting of a prescribed number of significant digits on the basis of the coordinates of the pointed dot, and sending the numeral to an input data display processing part 12. The processing part 12 indicates the display of an input numeric data display picture 5 for confirming whether the input numeric data is proper or not. Then, a picture data control part 13 outputs the input numeric data display picture 5 based upon the input numeral on a display screen 3, so that an operator confirms it immediately.

Binary and decimal system conversion device

Abstract: PURPOSE:To perform conversion processing with high-speed when binary data are converted into decimal data, by taking out and processing the binary data by 4 bits. CONSTITUTION:ADR (result of decimal data) resistor 106 is initialized by the output of a selector 107. While, binary data to be converted are stocked in a BR (binary data) resistor 101. Binary data stocked in the BR resistor 101 are taken out from the upper position of selection control of a selector 102 by 4 bits. The 0-3 bits of BR resistor 101 are taken out. The binary data of these 4 bits are converted by the gate circuits 103 and 104, and becomes the input of a decimal adaptor D- ADD1 105 which performs decimal addition of 1 figure. At a result of this addition, the result of decimal addition of 4 bits and a carry signal are outputted.

Efficient computation of the distribution functions of student's t chi-squared and fto moderate accuracy

Abstract: Ling (1978) recently reported on the accuracy of some approximations to the tail areas of F, chi-squared and F to help design efficient and moderately (3 to 5 decimal places) accurate programs for these probabilities. This paper examines two further approximations, and stresses the need for careful coding if one is to avoid loss of accuracy in single precision implementations on short word length computers. With careful coding five decimal places can easily be obtained for t and chi-squared probabilities, while for t four places are obtainable with reasonable computational effort.

A Sense of Numeration History for the Elementary School Teacher.

Abstract: The importance of the whole numbers (0, 1, 2, 3, 4, .. . ) to the field of mathematics can hardly be overstated. They are the building blocks of mathematics and thus a starting point for the study of mathematics. A substantial portion of the mathematics curriculum of the elementary school is devoted to developing an understanding of these numbers, their relative sizes, the four basic operations on them, algorithms for performing these operations, and how these numbers can be applied to solve real world problems. Does this list contain all the major whole number topics of the elementary school curriculum? Definitely not! High on any list of important whole number topics should be the development of an efficient system for naming the whole numbers. Without such a system, we would not only be severely curtailed in our efforts to record numbers, but we would also experience difficulty in determining the smaller or larger of two numbers, and in computing their sum, difference, product, or quotient. Fortunately, we have a marvellous numeration system for doing this, namely, the Decimal System (also referred to as the Base Ten or Hindu-Arabic System). The spiral development of the decimal system is a major strand in the elementary school mathematics curriculum. Unfortunately, as many teachers and researchers acknowledge, this strand is beset with problems. More students than we care to admit have difficulty in learning the decimal system. A lack of understanding of this system hampers students in many ways. For example, many of the computational problems that students experience can be traced back to problems with numeration. Why so much trouble in learning the decimal system? Payne and Rathmell4 hypothesise:

Method for automatically rounding data on the Wang 2200 in basic computer language

Abstract: The method described permits any set of numbers within an allowable range to be rounded to any number of significant figures. This is accomplished by generation of an array (rounding position) data bank, which is unique for each combination of the following variables: (1) Chosen decimal position; (2) number range of the number to be rounded; and (3) number of significant figures to which this number is to be rounded. It is especially useful as a subroutine in programs that generate large quantities of figures (such as reserve or resource tonnages) that require rounding.

Binary-to-decimal converter

Abstract: PURPOSE:To convert a decimal number consisting of an optional number of digits into a binary number by storing a storage means with overflowing data generated in conversion, by supplying the overflowing data to an arithmetic circuit, and by processing it by decimal-to-binary conversion CONSTITUTION:In a decimal register 1, a decimal number to be converted is stored and in an arithmetic register 2, an initial value is set Firstly, a value ten times as great as the contents of the register 2 is added to the left-end decimal number of tens in the register 1 The sum as the addition result appears at the output of an adding circuit 3 The low-order digit bits of the 16-bit output of the circuit are set in the register 2 Further, the high-order four bits of the output of the circuit 3 are set as a decimal number of tens in the register 1 together with the left end nine digits of the register 1 and a decimal number as a following digit appears at the left end of the register 1 Thus, similar operation is repeated and when a detecting circut 4 detects all left-end nine digits of the register 1 being 0s and no overflow is being caused, the decimal-to-binary con- verting operation ends

Decimal-to-binary converting circuit

Abstract: PURPOSE:To decrease the converting time of numerical value for a decimal- binary converting circuit, by using hardware circuits including a storage circuit, a binary adder circuit, a digit designating circuit, a latch circuit, etc. and eliminating a converting process using a software. CONSTITUTION:A decimal-binary converting circuit includes the 1st latch circuit 1 which stores an N-digit decimal number, a digit designating circuit which designates each digit, and a multiplexer circut 3 having a data input D and a control input C that deliver each digit value given from the circuits 2 and 1. The output of the circuit 1 is fed to the data input of the circuit 3, and the output of the circuit 2 is fed to the input C of the circuit 3. Furthermore, a decimal number is converted into a binary number and stored in a storage circut 4, and the outputs of the circuits 2 and 3 are fed to the circuit 4. The output converted into a binary number given from the circuit 4 is fed to the input A of one side of a binary adder circut 5. The output of the circut 5 is temporarily latched at the 2nd latch circuit 6. The output of the circuit 6 is fed to the input B of the other side of the circuit 5. Thus the time can be decreased for the decimal- binary converting process without using any software.

Data processing apparatus with prediction facility for the processing of decimal digit short operands

Abstract: A microprogrammed data processing system includes a cache memory 750, a decimal unit 730 and an execution unit 714. The throughput of the system is increased when processing short operands, which contain 15 decimal digits or less, by apparatus in the decimal unit which detects the short operand and determines the number of words therein and the number of cache memory cycles between the cycle in which the first word of the short operand is received from cache memory and the cycle on which the first assembled word is to be transferred to the execution unit for processing, and informs the execution unit accordingly in advance of the operands being received thereby. The execution control unit responds to vector branch signals PKVCTR 0-3 from the decimal unit to cause to firm- ware to branch to an appropriate address in the execution control store 701-2. This provides the subroutine for processing the short operand without unnecessary looping and branching.

Technical Computing Machines

Abstract: The computing machine patented by Konrad Zuse (Diploma Engineer) differs from other machines principally in the following ways: a) The number values put into the machine are translated into binary numbers (powers of 2). Actual calculating operations are carried out in the binary [“sekundal”] system and then reconversion takes place into the decimal system. The execution of an operation in the binary system requires either mechanical or electrical relays which need only have two states; thus they can be of a very simple nature. For example, the electromagnetic neutral relay should be mentioned; this can only assume the positions “responded” and “fallen away” and is in fact a carrier of binary data. b) The calculating operations for technical calculations are automatically carried out by the machine with the aid of a computing plan (which is read) and a store unit.

Binary-to-decimal conversion system

Abstract: PURPOSE:To increase a binary-to-decimal conversion speed by discriminating one of decimal numbers 0-9 which corresponds to a binary input number. CONSTITUTION:Comparing means 11-19 read a numeral and digit data out of a storage device stored previously with numerals 1-9 and decimal number data, and compare a refernce value nearly in the middle of the lower limit and upper limit values of each digit with the binary input number. Thus, the comparing means 11-19 discriminate the binary input number on the basis of its value successively to discriminate one of decimal numbers 0-9 which corresponds to the input number. Consequently, a necessary frequency of discrimination is decreased.

BCD-8421-code serial tetrade adder and subtractor - includes BCD and=or, and BCD-plus-6 to decimal decoders

Abstract: A serial tetrade adder and subtractor operating in BCD-8421 code has an arithmetic unit in the form of a tetrade adder and a tetrade subtractor or a switchable tetrade arithmetic unit. Prior to each first addition in each decimal location, the base number 6 (LHHL) is added in and before each first subtraction in each decimal location the base number 6 is removed by subtraction prodded that the numerand is an addition result. The arrangement includes a BCD to decimal decoder circuit. The display involves first removing the base number 6 from each decimal location by subtraction. Alternative arrangement involve BCD plus 6 to decimal decoder circuits and a mixture of BCD to decimal and BCD plus 6 to decimal decoder circuits.

Decimal-quadruple generating circuit

Abstract: PURPOSE:To perform the process of arithmetic smoothly at a high speed and to utilize the 6-adding and -subtracting circuits of a decimal a metic processor, by providing the 6-adding and -subtracting circuits, which add and substrate specific digits of a decimal number respectively, before and after a binary operating device. CONSTITUTION:When a binary number is expressed as B=b0, b1-bn, we have B=4(...4(4(4X0+b0b1)+b2 b3)+...)+bn-1b 64 bn in decimal contain. Then, an input in decimal notation. Then, an input binary-coded decimal number is shifted to the left (to high-order digits side) by two bias through a shifting circuit 4 to be inputted to one input terminal of a binary arithmetic 1, and at the same time, the same input is coded by a coding circuit 8 and, after being shifted to the left by one bit through a shifting circuit 3, is inputted to a 6-adding circuit 5 which adds (0110)2, thereby supplying its output to the other input of the binary arithmetic circuit 1. Digits, which are not carried binary addition, of the output of the binary arithmetic circuit 1 are supplied to a 6-subtracting circuit 6 which substracts (0110)2, so that a required quadruple number appears at its output.

Computer capable of designating output digit

Abstract: PURPOSE:To make key input operation easy during an automatic operation based on a program and to output both the integer and decimal parts corresponding to the designated number of digits, by designating the number of digits of the information to be delivered with a key and at the same time designating both the integer and decimal parts making a decimal point key a border. CONSTITUTION:The numerical value of plural digits is stored in a numerical information storage register X, and the decimal point information is stored in a decimal point information storage register X. Then an operation is carried out through an operator AU. The register X is so constituted as to hold cyclically the information, and the decimal point information corresponding to the numerical information of the register X is stored in the register x. Not only the numerical information given from a numerical value input switch Kn provided to an input switch unit IU but the information of a decimal point switch K, print digit number and print instruction switch KS, KP and others are supplied to the register X. Then an optional number of digits to be delivered among the integer and decimal parts of the numerical information is designated by a circuit such as an FF, F, FS and the like and by a combination of the switches KS and KP. Thus a print control progress signal generating circuit PP is controlled.

Clock forming circuit for stop watch of electronic watch

Abstract: PURPOSE:To reduce the number of transistors used and make uniform as far as possible the distance between adjacent positions of signals that are to be crossed out by simplifying the constitution of a control circuit of signal formation for a stop watch. CONSTITUTION:The control circuit for crossing out 28 shots per second out of 128Hz frequency division signal 423 is provided with an inverter 401, gates 402- 404, inverter 405 and FF406, to form 100Hz signal for a stop watch. The above mentioned crossing out operation is provided with a decimal counters FF412- 415 that count decimal figures 0-9 with the speed of 1/100 seconds order for a decimal point, a group of gates 416-419 that detect a specified state from data at the speed of 1/100 seconds order for a decimal point, a decimal figures, 0-9 at the speed of 1/10 seconds order for a decimal point, and decimal number detecting gates 430-431.