Showing papers on "Test card published in 2011"

Analog and digital mixed signal chip test card

Abstract: The invention discloses an analog and digital mixed signal chip test card. A chip test circuit on the test card comprises a system interface module, a configuration chip, an FPGA processing module and a digital-to-analog conversion module; the system interface module is connected with the FPGA processing module through a bus; the FPGA processing module connected with the configuration chip is connected with an input end of the digital-to-analog conversion module through a digital signal output end, and is connected with a tested chip carrier through a control end; an output end of the digital-to-analog conversion module is connected with an analog signal input end of the tested chip carrier; and a digital signal output end of the tested chip carrier is connected with a digital signal input end of the FPGA processing module. The chip test card has reasonable design, has the characteristics of steady performance, quick test speed, high efficiency, flexible and convenient use and the like, and meets the test need of analog and digital mixed signal chips; in addition, the chip test card can also be matched with other types of test cards or functional boards so as to realize the test need of different types of chips.

Method for testing reliability of intelligent card

Abstract: The invention provides a method for testing reliability of an intelligent card by aiming at the phenomenon of product performance degradation or function failure caused by unstable application environment in the process of production, manufacturing and application. The method comprises the following testing processes of: (1) generating a test card; (2) applying stable DC voltage offset to measurecurrent ICC1 on power supply pins of the test card through card reading equipment; then inputting an interference signal to the power supply pins of the test card by an interference circuit to measure current ICC2, and if the ICC2 exceeds five times of the normal current value ICC1, stopping the test, and judging the test is failed; and if the ICC2 is within five times of the normal current valueICC1, continuing the following inspection steps; and (3) after an interference test is completed, inspecting the performance and the function of the test card, and if the test card has the performance degradation or the function failure, judging that a sample does not pass the test by the testing result; and if the performance and the function of the test card are normal, judging that the sample passes the test by the testing result.

Improved sample test cards

Abstract: Sample test cards having an increased sample well capacity for analyzing biological or other test samples. The sample test cards comprises a fluid channel network disposed in both the first surface and the second surface and connecting the fluid intake port to the sample wells, comprising a plurality of through-channels operatively connected to one or more of the fill channels and a plurality of horizontally orientated fill ports operatively connecting the fill channels to the sample wells. The test card of this invention may comprise from 80 to 140 individual sample 25 wells, for example, in a test card sample test cards of the present invention have a generally rectangular shape sample test card having dimensions of from about 90 to about 95 mm in width, from about 55 to about 60 mm in height and from about 4 to about 5 mm in thickness.

Semiconductor test system and method

Abstract: The present disclosure provides a semiconductor test system and method. The semiconductor test system includes a wafer stage to hold a wafer having a plurality of light emitting devices (LEDs); a probe test card operable to test each test field of the wafer; and a light detector integrated with the probe test card to collect light from a LED of the wafer. The invention decreases the package cost and increases the manufacturing efficiency.

Test card for motherboards

Abstract: A test card includes a power interface, a controller, a test interface, and a test point. The test interface includes a power pin, a start pin, and a data signal pin. The power interface is connected to the controller and the power pin, and also connected to an external power to receive a work voltage. The controller transmits a turn-on signal to the start pin. The test point is connected to the data signal pin. When an interface of a motherboard is connected to the test interface, the power pin, the start pin, and the data signal pin are connected to corresponding pins of the interface of the motherboard. The motherboard outputs a data signal to the test point through the motherboard interface and the test interface after the controller receives the turn-on signal.

Test paper, test card and test method for testing vaginitis by female per se

Abstract: The invention provides test paper, a test card and a test method for testing vaginitis by a female per se The test paper 1 is pH test paper prepared by soaking neutral white test paper in a mixed indicator and drying the neutral white test paper in the air The test paper, the test card and the test method for testing vaginitis by the female per se comprise a test card 3 consisting of the test paper 1 and test result contract colors 2, and a secretion extracting bar 4, wherein the test paper and the test result contract colors 2 are simultaneously positioned on the same test card 3 The invention is implemented by the technical scheme that: the test method comprises the following steps of: dipping vagina secretion by using the secretion extracting bar 4, and putting on the test paper 1; and comparing with the color shown by the test result contract colors 2 after 30-second color change so as to obtain a test result

IC test card for prepayment energy meter

Abstract: The utility model discloses an integrated circuit (IC) test card for a prepayment energy meter. The IC test card comprises a main panel, an IC master card body, a plurality of card slots for plugging SIM (subscribe identity module) card and a control switch, wherein the IC master card body and the card slots are all fixed on the main panel; the plurality of card slots are electrically connected with the IC master card body; and the control switch is electrically connected with the IC master card body and the card slots. By using the IC test card, the testing efficiency is high, signal transmission is performed between the SIM card and the energy meter through the IC master card body and the SIM card is not directly contacted with the energy meter, so that the damage of the SIM card in the test is prevented.

Test card for testing one or more devices under test and tester

Abstract: A test card for testing one or more devices under test comprises a plurality of test resources configured to communicate with the one or more devices under test. The test card further comprises a matching circuit configured to receive a test sequence of at least two matching instructions followed by one or more processing instructions. The matching instructions define a group of resources which are to operate in accordance with the processing instructions. The matching circuit is configured to determine based on the at least two matching instructions whether a given test resource out of a plurality of test resources belongs to the group or not and to forward the processing instructions to the given test resource if the given test resource belongs to the group and to not forward the processing instructions to the given test resource if the given test resource does not belong to the group.

Tool jig for integrated test of double cards

Abstract: The utility model discloses a tool jig for integrated test of double cards. The tool jig comprises a test bench (1) and a card push plate (2), wherein the surface of the test bench is provided with a first test area (3) and a second test area (4) from left to right; one side of each of the two test areas is provided with a row of test thimbles (5) respectively; the front ends of the first test area and the second test area are provided with a first positioning bar (6) and a second positioning bar (7) for supporting the push card plate (2) in turn; the outer side of the push card plate (2) is provided with a horizontal splint (21) for clamping two separated test card plates (22) inwards; the second positioning bar (7) is provided with a clamping groove (71) for clamping the test card plate (22); the first positioning bar (6) is a cuboid bump and provided with a screw hole; and the test card plate (22) is inserted into a strip groove (23) thereon through a screw and fixed on the first positioning bar (6).

Wake-up signal test system and test card thereof

Abstract: A wake-up signal test system is used to test a wake-up signal of a platform controller hub (PCH). The wake-up signal test system includes a test card and an oscillograph. The oscillograph is connected to the PCH. The test card includes a board, a golden finger, and button. The golden finger is used to insert into a PCIE socket. The button is connected to a first ground pin and a wake-up signal pin of the golden finger. When the golden finger is inserted into the PCIE socket, the first ground pin is connected to a second ground pin of the PCIE socket. The first wake-up signal pin is connected to a second wake-up signal pin of the PCIE socket. When the button is pressed, the first wake-up signal pin is connected to the first ground pin to output a low level signal to the PCH.

Test card for performance check of inspection meter and storage case for storing the same

Abstract: PROBLEM TO BE SOLVED: To provide a test card which can be applied to a number of various type inspection meters such as hanger type, conveyer type, desk-top type, handy type and see-through type and is used for prior adjustment or performance check of the inspection meter, and a storage case for the test card enabling a test to be performed while estimating convenience of the performance check and a state where any foreign substance is mixed into an actual product.SOLUTION: A test card is provided which checks the performance of an inspection meter and is characterized by disposing a test piece and a primary/secondary code which is obtained by coding test conditions such as a kind and a size of the test piece, or an IC chip.