Showing papers on "Test suite published in 1987"

Japanese Activities on On‐Line Testing

Abstract: The on-line computer test control method (the on-line test) is a new experimental technique to directly simulate the earthquake response behavior of structural systems without using a shake table device. This paper presents a review of Japanese activities in the development and application of the on-line test. First, the history of the development of the on-line test and its software and hardware algorithms are described, and 27 previous on-line tests conducted by Japanese researchers are summarized. Second, the reliability of the on-line test is discussed. Sources that may bring errors in the response are defined, and efforts to examine their effects on the response and to control the response error growth are introduced. Third, two extensions of the on-line test concept are presented: the fast on-line test and the substructure on-line test.

Verification of computer software

Abstract: A computer program is verified, unit by unit, by automatically instrumentating the code and generating a test driver program which executes all branches of an instrumented code unit. The code is instrumented by operating processors to standardize the code format and to insert executable tracer statements into each block of reformatted code between control statements. A pseudocode having only control statements and tables identifying valid linkages between blocks of code are generated by another processor for use by a verifier in selecting values of input variables and expected outputs for test cases which execute each block of code in the selected unit. Another processor generates the test driver program from the test cases and a software test specification identifying the test cases and expected results. The test driver program and instrumented code unit are compiled and linked to repeatively execute the instrumented code unit to implement all the test cases. Results of the test cases are printed out indicating the sequence of block linkages generated by each test case, the expected output values and the actual output values.

A production-quality UNIX Very High Speed Integrated Circuit (VHSIC) Hardware Description Language (VHDL) subset analyzer

Abstract: : This paper describes the design and implementation of the Air Force Institute of Technology's (AFIT's) UNIX-based VHDL Analyzer. The purpose of this tool is to facilitate the introduction of VHDL into the academic environment, which may not be able to use the Department of Defense's VMS-based software. This research emphasized two areas: the criteria for a production-quality software product and the design of an efficient Intermediate Representation (IR) that serves as an interface between the Analyzer and other tools in the AFIT VHDL Environment (AVE). Background on other UNIX VHDL analyzers, as well as other IRs, was presented. A two-part IR, based on Dallen's Patois hardware description language and named the VHDL Intermediate Access (VIA), was designed, and examples were given that illustrate its use. Test results showed that the Analyzer passed over 75% of the conformance tests from the VHDL VMS Analyzer Test Suite and performed well in the areas of compile time, memory usage, and disk usage. Recommendations for future research include adding user options to the Analyzer and implementing a design library for VHDL designs.

Models for Use in Computerized Test Systems

Abstract: The main activities of a computerized test system consists of calibrating the difficulties of the test items in the bank, constructing tests from them, establishing norm distributions, and diagnozing the test scores Such activities are only possible if adequate models and procedures are available It is the purpose of this paper to present successful models from item response theory, operations research, and statistics, and to show how they lead to simple procedures that can be integrated into a computerized test system

Implementation of a prototype CAIS environment

Abstract: This paper describes a project to investigate the feasibility, performance and utility o f a CAIS compliant Ada Programming Support Environment. A working model of an environment was built, with a command language interpreter and a small toolset. Tools from the host environment have been imported and made to behave as native CAIS tools. A number of tools have been ported from a parallel effort by a MITRE corporation team with little difficulty. The prototype was built initially for correctness and enhanced later for performance improvements. The performance was found to be acceptable as a test bed for development of prototype tools and offered hope for the performance of a product-quality implementation. A test suite for compliance with the standard was partially implemented.