Showing papers on "VHDL published in 1980"
23 Jun 1980
TL;DR: An algorithm to synthesize combinational logic from the description in one such language (DDL) is discussed and a sample implementation and the cost comparison are provided.
Abstract: Hardware Description Languages are used to input the details of a digital system into an automatic design system. An algorithm to synthesize combinational logic from the description in one such language (DDL) is discussed. A sample implementation and the cost comparison are provided.
6 citations
01 Jan 1980
TL;DR: VAL augments the expressions of VHDL with new features to describe timing behavior, and evaluates expressions with time-dependent values of subexpressions and objects such as ports and signals.
Abstract: Names and expressions of VAL closely follow those of VHDL. (Refer to Chapters 6 and 7 of the VHDL LRM [25].) VAL augments the expressions of VHDL with new features to describe timing behavior:
Timed expressions —Expressions may be associated with time. Thus, expressions are evaluated with time-dependent values of subexpressions and objects such as ports and signals.
Time qualified boolean expression —A boolean expression is qualified so that it is evaluated over a given time interval.
5 citations