Showing papers on "VHDL published in 1985"
TL;DR: The authors present a time-based execution model and describe VHDL's features, using a coded four-bit adder to illustrate the use of the most significant ones and describe the concept of design entity, the language's primary abstraction mechanism.
Abstract: In March 1980, the US Department of Defense (DoD) launched the Very High Speed Integrated Circuits program to advance the state of the art in highspeed integrated circuit technology, specifically for defense systems. In 1981 the Institute for Defense Analyses (IDA) arranged a workshop to define the requirements for such a standard. The DoD used the final report of the IDA workshop as a basis for defining a set of language requirements for the VHSIC Hardware Description Language (VHDL), issuing a request for proposal for a two-phase procurement of VHDL and its support environment. VHDL supports the design, documentation, and efficient simulation of hardware from the digital system level to the gate level. While designed to be independent of any underlying technology, design methodology, or environment tool, the language is also extendable toward various hardware technologies, design methodologies, and the varying information needs of design automation tools. The authors begin their discussion of VHDL by describing the concept of design entity, the language's primary abstraction mechanism. They then present a time-based execution model and describe VHDL's features, using a coded four-bit adder to illustrate the use of the most significant ones. Various figures are presented that contain the block diagrams and the code for this example.
64 citations
TL;DR: The feasibility of using a subset of Ada as a hardware description language within the syntax of Ada is discussed, which allows the compiled Ada program to act as a functional simulator.
Abstract: The requirements of an algorithmic level hardware description language can be met by a software language with only limited feature enhancement. This paper discusses the feasibility of using a subset of Ada as a hardware description language. Methods are presented for realizing the extra features required for hardware description within the syntax of Ada. This allows the compiled Ada program to act as a functional simulator. Our particular context for hardware description is as a source language for a hardware compiler. Rules are presented for translating a circuit described in the Ada subset onto a control/data-flow graph (CDFG), our intermediate level form.
47 citations
01 Mar 1985
TL;DR: The objectives of this work were to have a representation that permits expression of Organizational Level designs, can be used for synthesis of logic networks, and serves as a communication medium between system and logic designers.
Abstract: A representation for Computer Organization is presented. The objectives of this work were to have a representation that permits expression of Organizational Level designs, can be used for synthesis of logic networks, and serves as a communication medium between system and logic designers. Features of the language for design capture and synthesis are identified and discussed. Finally an experimental language based on an existing Hardware Description Language, used to test the concepts in the design of the representation is discussed.
1 citations