Showing papers on "View model published in 1977"

Another general purpose computer architecture

Abstract: This paper describes an architecture for a general purpose computer system. This architecture has inherent characteristics that are oriented toward the execution of modular software. The addressing mechanism provides process and procedure integrity. The process management mechanism directly supports interprocess communication. Software development assistance, minimization of operating system complexity and efficient use of system processing resources are typical requirements that influenced this design. The set of architectural characteristics which seemed to satisfy these r e q u i r e m e n t s w a s chosen rather arbitrarily and includes: o Concurrent processing of modular programs. o Asynchronous multiprocessing. o Addressing protection within a process as well as between processes. o A logical address space for each process larger than system primary memory. o Dynamic relocation of data and instructions. The central system organization would consist of: o A primary memory with a maximum address space of 16 million (2**24) 36-bit, tagged , words. o A single processor dedicated to inter-process communication. o A mix of other processors which may include:-One or more general purpose processors.-One or more input/output processors.-Zero or more special purpose processors. o A bus over which the above communicate. A design philosophy of the system is that all processes perform services on behalf of some person or process. For example, executing a program is performing a service for the user who initiates it. Processes are authorized to perform services by means of interprocess messages. For example , the command interpretation process of an operating system would activate a program by sending it an appropriate authorization message. Authorization messages revert to, i.e., are sent back to, the requestor of a service upon comgletion of that service. Each process is provided with an authorization queue and a reversion queue, which contain, respectively, service request authorization messages and reverted authorization messages. A process may proceed in its execution only under the authority of the message currently at the head of its authorization queue. If there is no message in this queue then the process is blocked. A process may retrieve reverted authorization messages from its reversion queue at its discretion. Each processor's instruction set includes several instructions that cause the manipulation of authorization messages. The message manipulation instructions are relayed to a special processor, called a system management processor, which is the only processor permitted to modify the authorization and reversion queues of a process. Access …