Showing papers on "Virtual network published in 1989"

Virtual network for personal computers

Abstract: A network for personal computers includes a network arbiter (10) disposed centrally with respect to a plurality of network stations (12), (14), (16), and (18). Each of the network stations (12-18) includes a personal computer (20), a network peripheral (24) and an interface (22). Each of the interfaces (22) interfaces with the arbiter (10) through a communication link. Each of the network stations has associated therewith a network program (82) that is operable to be executed by a central processing unit (56) in the background to an application program (80). Each of the network programs (82) has associated therewith at the network station a network status memory (86). When information is generated that is to be sent to a network peripheral, an interrupt program (92) interrupts output data from the application program (80) and controls the central processing unit (56) to output the data on a line (94) to the network interface (22). This data is then routed to the arbiter (10) along the line (98).

Intelligent network management for customer controlled services

Abstract: The authors describe an intelligent network that enables customers to define their own services. A customer controlled service concept is introduced in terms of a network hierarchy and functional assignment, and the basic network architecture is presented. Network resources which allow customer control are clarified, and a customer control process is examined. A private virtual network service is introduced, and practical customer controlled services are presented. >

Programming with active data

Abstract: In this paper we have defined a virtual systems architecture (VSA), which combines both data parallel and process parallel models of computation Data manipulations strategies for the efficient implementation of the VSA have been considered for various data types and algorithms, which show that a packet based virtual array implementation is required We introduce a packet routing scheme the mad postman that is shown to have considerably better latency properties than previously published results and considered synchronous cellula automata to implement this scheme In general, the mad postman is most advantageous to use in lower dimension networks, for example 2-D meshes, where latency is usually higher due to higher network diameter In such networks the efficiency of the mad postman routing will be higher due to the smaller number of dead address digits generated per each packet Such networks match form to function, and in current implementation technologies (ie VLSI chips and PCBs), they will therefore provide cheaper hardware, thus allowing for a higher cost/performance ratio to be achieved

FLAN: virtual inter-linking using floppy disks as a local area network

Abstract: The paper discusses how to share functions such as cataloguing and interlibrary loan between libraries and other information centres by setting up a virtual network of microcomputers using TINlib software. Data exchange between eight information centres is effected using floppy disks, thereby creating a Floppy disk Local Area Network, or FLAN.

The higher radix hypercube as an interconnection and virtual network

Abstract: The HIGHER RADIX HYPERCUBE (HRH) is investigated in this paper as an interconnection network for multiprocessors as well as a virtual network. The HRH is based on a radix higher than two, the radix for the hypercube. We have compared several topological parameters' for the HRH with the hypercube. It can be seen that HRH provides smaller diameter for a small price. A mapping and a partitioning algorithms are proposed for mapping different topologies to the HRH. In our algorithm, we first map the problem topology to a virtual HRH, which is the most natural HRH for the problem. The virtual HRH is then transformed into the actual topology. This algorithm is applicable to HRH used either as an interconnection or a virtual network. The partitioning algorithm reduces a large application topology to the required size by the iterative reduction process. Three examples of mapping topologies onto the HRH are also presented.