Wave digital filters (WDFs) are modeled after classical filters, preferably in lattice or ladder configurations or generalizations thereof. They have very good properties concerning coefficient accuracy requirements, dynamic range, and especially all aspects of stability under finite-arithmetic conditions. A detailed review of WDF theory is given. For this several goals are set: to offer an introduction for those not familiar with the subject, to stress practical aspects in order to serve as a guide for those wanting to design or apply WDFs, and to give insight into the broad range of aspects of WDF theory and its many relationships with other areas, especially in the signal-processing field. Correspondingly, mathematical analyses are included only if necessary for gaining essential insight, while for all details of more special nature reference is made to existing literature.

Wave digital filters: Theory and practice

Closed-form expressions are presented for amplitude-oriented low-pass, high-pass, and bandpass sampled-data transfer functions suitable for realization as 1) switched-capacitor lossless discrete integrator (LDI) ladder filters, or 2) wave digital filters. Other types of realizations are also possible, such as those employing voltage inverter switches (VIS's), the recently introduced switched-capacitor "voltage wave" filters, and standard recursive digital realizations. The filters possess optimum equirippie (or maximally flat) passbands and monotonic stopbands with arbitrary selectivity. The low-pass and high-pass cases are derived from distributed passive prototype functions, but the more important bandpass functions are quite novel, appearing here for the first time.

https://ieeexplore.ieee.org/iel5/31/23575/01085860.pdf

Transfer functions for switched-capacitor and wave digital filters

Building blocks for digital filters are discussed. They require 0.7 mm/SUP 2/ or 3 mm/SUP 2/ per pole-zero for a dedicated and a partly programmable realization, respectively. They are realized in 6 /spl mu/m NMOS technology, with 16-bit words and working at bit rates up to 10 Mbit/s. With the exclusion of data conversion, scaling will make them competitive with switched capacitor realizations for 3 /spl mu/m technology, in terms of silicon area and speed. These compact results are achieved due to proper minimization in the design. The experience with the above designs is then generalized into a methodology for custom digital filters. An important concern is a hardware-minimization scheme over all design levels (algorithm, bit-serial architecture, and layout style) with efficient IC implementation and performance in mind. It leads to the possibility of an automated design. The design is supported by computer aided design tools for design verification on all levels, and for file management as well as layout. A formal design of a third-order elliptical wave digital filter demonstrates the concept. The resulting chip area is 1.8 mm/SUP 2/ in 6 /spl mu/m NMOS. The simulated maximum bit rate is 5 MHz (corresponding to 312 kHz sampling rate), with a power consumption of 18 mW.

Compact NMOS building blocks and a methodology for dedicated digital filter applications

A new approach to sampled-data filter realisation based on switched-current techniques is presented. The new method relies on the wave-digital filter concept. A methodology to obtain current-wave analogue filters and some preliminary results are explained. The simplicity and correctness of the approach are encouraging for future work.

Wave analogue filters using switched-current techniques

Experimental results of a switched capacitor (SC) N-path filter integrated in a CMOS Si-gate technology are reported, with N=6. The circuit is based on the theory of wave-flow networks and uses only fully stray-eliminating (usually referred to as stray-insensitive) SC amplifier and integrator circuits. The two main drawbacks of N-path filters, i.e. unwanted mirror frequencies due to path mismatch and clock feedthrough located in the passbands, as solved by multiplexing large filter parts and by using a third-order high-pass reference filter, respectively. The integrated six-path filter features low power consumption due to the use of dynamic amplifiers.

An integrated six-path wave-SC filter

Presents a novel approach to the realization of monolithic filters. The method is based on using sampled analog signals and is related to the wave digital filter in its design techniques. The eventual monolithic realization in NMOS technology is in the form of a switched-capacitor structure. The design is exact and there is no requirement for a high relative clock frequency. Only unity-gain buffers are required, as opposed to high-gain differential-input operational amplifiers, and so the technique is well suited to CMOS technology. Performance is determined by capacitance ratios and the design is optimally insensitive to parameter variations. Capacitance ratios are moderate relative to those encountered in existing switched-capacitor filters. Results are presented for a prototype integrated circuit design containing fifth- and seventh-order low-pass Chebyshev filters with a designed cutoff at one-eighth clock frequency. The responses achieved for the prototype design show excellent agreement with the theory.

A. Farrag

Papers

A prototype switched-capacitor voltage-wave filter realized in NMOS technology