A
Alan Baker
Researcher at Intel
Publications - 12
Citations - 684
Alan Baker is an academic researcher from Intel. The author has contributed to research in topics: Non-volatile memory & Flash memory. The author has an hindex of 9, co-authored 12 publications receiving 683 citations.
Papers
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Patent
Program/erase selection for flash memory
Jerry A. Kreifels,Alan Baker,George P. Hoekstra,Virgil Niles Kynett,Steven Wells,Mark Winston +5 more
TL;DR: In this article, the authors present a program sequence consisting of setting up a program command during the first write cycle, preforming a second write cycle to load address to address register and data to to a data register, programming during a program cycle and writing a program verify command during a third read cycle to verify the programmed data during a read cycle.
Patent
Processor controlled command port architecture for flash memory
Jerry A. Kreifels,Alan Baker,George P. Hoekstra,Virgil Niles Kynett,Steven Wells,Mark Winston +5 more
TL;DR: In this article, a semiconductor flash EPROM/EEPROM device which includes a command port controller for receiving command instructions from a data bus coupled to the memory device is described.
Patent
Method and apparatus for suspending the writing of a nonvolatile semiconductor memory with program suspend command
David A. Leak,Fasil G. Bekele,Thomas C. Price,Alan Baker,Charles W. Brown,Peter K. Hazen,Vishram Prakash Dalvi,Rodney R. Rozman,Christopher John Haid,Jerry A. Kreifels +9 more
TL;DR: In this article, a method and apparatus suspend a program operation in a nonvolatile writeable memory, which includes a memory array, a command register, and memory array control circuitry.
Journal ArticleDOI
An in-system reprogrammable 32 K*8 CMOS flash memory
Virgil Niles Kynett,Alan Baker,Mickey L. Fandrich,George P. Hoekstra,Owen W. Jungroth,Jerry A. Kreifels,Steven E. Wells,Mark Winston +7 more
TL;DR: In this article, the authors describe the design and performance of a 192-mil/sup 2/ 256 K (32 K*8) flash memory targeted for in-system reprogrammable applications.
Patent
Method and apparatus for preventing the erasure and programming of a nonvolatile memory
TL;DR: In this paper, a power supply generator incorporating an n-channel and a w-channel device in a wired-or configuration is coupled to a programming voltage Vpp and to a circuit voltage Vcc, and generates a node voltage Vpwr which is the greater of Vpp-Vtn and Vcc-Vtw.