The capacitor is a key element of electronic devices and is characterized by positive capacitance. However, a negative capacitance (NC) behaviour may occur in certain cases and implies a local voltage drop opposed to the overall applied bias. Therefore, a local NC response results in voltage enhancement across the rest of the circuit. Within a suitably designed heterostructure, ferroelectrics display such an NC effect, and various ferroelectric-based microelectronic and nanoelectronic devices have been developed, showing improved performance attributed to NC. However, the exact physical nature of the NC response and direct experimental evidence remain elusive or controversial thus far. In this Review, we discuss the physical mechanisms responsible for ferroelectric NC, tackling static and transient NC responses. We examine ferroelectric responses to voltage and charge, as well as ferroelectric switching, and discuss proof-of-concept experiments and possibilities for device implementation. Finally, we highlight different approaches for the optimization of the intrinsic NC response to maximize voltage amplification. Ferroelectrics-based materials can display a negative capacitance (NC) effect, providing an opportunity to implement NC in electronic circuits to improve their performance. In this Review, the authors discuss static and transient NC responses in ferroelectrics and highlight proof-of-concept experiments and possibilities for device implementation.

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Ferroelectric negative capacitance

The elegant simplicity of the device concept and the urgent need for a new "transistor" at the twilight of Moore's law have inspired many researchers in industry and academia to explore the physics and technology of negative capacitance field effect transistor (NC-FET). Although hundreds of papers have been published, the validity of quasi-static NC and the frequency-reliability limits of NC-FET are still being debated. The concept of NC - if conclusively demonstrated - will have broad impacts on device physics and technology development. Here, the authors provide a critical review of recent progress on NC-FETs research and some starting points for a coherent discussion.

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A critical review of recent progress on negative capacitance field-effect transistors

A Critical Review of Recent Progress on Negative Capacitance Field-Effect Transistors.

Recently, the proposal to use voltage amplification from ferroelectric negative capacitance (NC) to reduce the power dissipation in nanoelectronic devices has attracted significant attention. Homogeneous Landau theory predicts, that by connecting a ferroelectric in series with a dielectric capacitor, a hysteresis-free NC state can be stabilized in the ferroelectric below a critical film thickness. However, there is a strong discrepancy between experimental results and the current theory. Here, we present a comprehensive revision of the theory of NC stabilization with respect to scaling of material and device dimensions based on multi-domain Ginzburg-Landau theory. It is shown that the use of a metal layer in between the ferroelectric and the dielectric will inherently destabilize NC due to domain formation. However, even without this metal layer, domain formation can reduce the critical ferroelectric thickness considerably, limiting not only the range of NC stabilization, but also the maximum amplification attainable. To overcome these obstacles, the downscaling of lateral device dimensions is proposed as a way to prevent domain formation and to enhance the voltage amplification due to NC. These insights will be crucial for future NC device design and scaling towards nanoscale dimensions.

On the stabilization of ferroelectric negative capacitance in nanoscale devices

Negative capacitance in ferroelectric materials has been suggested as a solution to reduce the power dissipation of electronics beyond fundamental limits. The discovery of ferroelectricity and negative capacitance in the widely used class of HfO2-based materials has since sparked large research efforts to utilize these effects in ultra-low power transistors. While significant progress has been made in the basic understanding of ferroelectric negative capacitance in recent years, the development of practical devices has seen limited success so far. Here, we present a unique view of the field of negative capacitance electronics from the ferroelectric materials perspective. Starting from the basic principles of ferroelectric negative capacitance, we discuss the desirable characteristics of a negative capacitance material, concluding that HfO2-based ferroelectrics are currently most promising for applications in electronics. However, we emphasize that material non-idealities can complicate and in some cases even inhibit the design and fabrication of practical negative capacitance devices using HfO2-based ferroelectrics. Finally, we review the recent progress on experimental devices and give an outlook on the future direction of the field. In particular, further investigations of the microscopic structure of HfO2-based ferroelectrics are needed to provide an insight into the origin of negative capacitance in this material system and to enable predictive device design.

Progress and future prospects of negative capacitance electronics: A materials perspective

The emergence of negative capacitance as a way to limit power dissipation in CMOS logic transistors has raised the question of response delay of ferroelectric negative capacitance. Latency requirements for digital logic require a response time on the order of 10 ps or less. In this letter, we establish a coherent theoretical framework to analyze the delay between the clock edge at the gate and the response of the semiconductor channel in a ferroelectric negative capacitance transistor. The standard Landau–Khalatnikov equation approximates the slow, diffusive limit of the classical equation of motion. Therefore, using it to predict the response speed is unphysical. After extracting the damping and kinetic inductance from THz spectroscopy data, we simulate the full classical equation of motion and analyze the delay. We find that for doped hafnium oxides, the intrinsic delay is around 270 fs, far less than what is required for digital logic.

Alexander John Rosner

Papers

Intrinsic speed limit of negative capacitance transistors