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Anand Rajaram
Researcher at University of Texas at Austin
Publications - 23
Citations - 525
Anand Rajaram is an academic researcher from University of Texas at Austin. The author has contributed to research in topics: Skew & Clock skew. The author has an hindex of 13, co-authored 22 publications receiving 516 citations. Previous affiliations of Anand Rajaram include Synopsys & Magma Design Automation.
Papers
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Proceedings ArticleDOI
Reducing clock skew variability via cross links
TL;DR: This paper proposes two link insertion schemes that can quickly convert a clock tree to a nontree with significantly lower skew variability and very limited wirelength increase and can be applied to the recently popular nonzero skew routing easily.
Proceedings ArticleDOI
Practical techniques to reduce skew and its variations in buffered clock networks
Ganesh Venkataraman,Nikhil Jayakumar,Jiang Hu,Peng Li,Sunil P. Khatri,Anand Rajaram,P. McGuinness,Charles J. Alpert +7 more
TL;DR: The experimental results show that the link based non-tree approach can reduce the maximal skew by 47, improve the skew yield from 15% to 73% on average with a decrease on the total wire and buffer capacitance.
Proceedings ArticleDOI
MeshWorks: an efficient framework for planning, synthesis and optimization of clock mesh networks
Anand Rajaram,David Z. Pan +1 more
TL;DR: MeshWorks is presented, the first comprehensive automated framework for planning, synthesis and optimization of clock mesh networks with the objective of addressing the above issues.
Proceedings ArticleDOI
Variation tolerant buffered clock network synthesis with cross links
Anand Rajaram,David Z. Pan +1 more
TL;DR: This paper proposes a unified algorithm for synthesizing a variation tolerant, balanced buffered clock network with cross links that can make use of ordinary buffers and does not require SPICE for clock network synthesis.
Proceedings ArticleDOI
Improved algorithms for link-based non-tree clock networks for skew variability reduction
TL;DR: Two new algorithms are proposed that are able to achieve the same or better skew reduction and scale extremely well to big clock networks, i.e., the bigger the clock network, the less overall link cost (less than 2% for the biggest benchmark the authors have).