As link bit rates within and between data centers continue to increase, it is challenging to maintain low power consumption while accommodating ever-tighter optical link budgets. Although power consumption can be reduced by co-packaging optical transceivers with electrical switches and employing optical switching, both approaches increase losses, further compressing link budgets. Local oscillator-based coherent receivers traditionally employed for long-haul systems provide a path to higher bit rates and improved link budgets, but their power consumption is excessive owing to high-speed digital signal processing (DSP). We discuss alternative designs for coherent receivers, such as DSP-free coherent receivers and Kramers–Kronig (KK) receivers. We compare them in terms of receiver sensitivity, power consumption, and complexity.

Coherent Data Center Links

In a high-speed coherent optical transmission system, typically the signals obtained at the receiver front-end are digitized using very high-speed ADCs and then processed in the digital domain to remove optical channel impairments. In this work, we show that these signals can instead be processed in the analog domain, which can significantly reduce the power consumption and the complexity of the receiver. The first all-analog adaptive equalizer for receivers of coherent dual-polarization optical links has been presented with its detailed architecture and measurement results. The proof-of-concept equalizer uses the constant modulus algorithm for blind adaptation of its weight coefficients to implement a 4 × 4 2-tap FIR filter in 130 nm SiGe BiCMOS technology. Its functionality is evaluated experimentally for 40 Gb/s data rate and 10 km standard single mode fiber channel. This demonstration shows that the use of all-analog processing for short reach data-center interconnects is feasible and is a much simpler solution than the use of the high-speed ADC+DSP based approach. Moreover, when implemented in advanced CMOS or FinFET technologies, the power consumption of the equalizer is expected to be significantly lower than the DSP based implementations in similar process technologies.

All-Analog Adaptive Equalizer for Coherent Data Center Interconnects

We propose a novel implementation of a complex analog equalization filter for the compensation of frequency-dependent variations in coherent optical links. The analog compensation filter can be used in coherent-lite optical communication links where digital signal processing (DSP) is removed to limit the complexity and power consumption. In these links, the filter can compensate for electrical bandwidth limitations and distortion introduced by chromatic dispersion in the fiber. The complex filter is implemented by combining four distributed analog finite-impulse response (FIR) filters to obtain the necessary response. The filter delays are implemented using active delay cell structures to create a compact solution. The analog filter is implemented in a 55-nm BiCMOS technology and consumes 185-mW core power for five complex filter taps. Performance is evaluated using the S-parameter measurements, noise and linearity measurements, and real-time system experiments using 112-Gb/s 16-QAM-modulated signals.

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Analog I/Q FIR Filter in 55-nm SiGe BiCMOS for 16-QAM Optical Communications at 112 Gb/s

Electro-optical transceivers can be implemented employing all-analog signal processing in order to achieve low values of power consumption and latency. This paper shows that the spectral efficiency of such solutions can be increased by combining orthogonal multicarrier techniques and off-the-shelf microwave components. A real-time 108-Gbit/s experiment was performed emulating a wavelength division multiplexing (WDM) system composed of five optical channels. The optical carriers were provided by an externally injected gain switched optical frequency comb. Each optical channel transmitted a 21.6-Gbit/s orthogonal subcarrier multiplexing (SCM) signal that was modulated and demodulated in the electrical domain without the requirement for digital signal processing. The net data rate remained higher than 100 Gbit/s after taking into account forward error correction overheads. The use of orthogonally overlapping subchannels achieves an unprecedented spectral efficiency in all-analog real-time broadband WDM/SCM links.

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WDM Orthogonal Subcarrier Multiplexing

A PAM4 based direct detection system has been standardized for short-distance data center interconnects because of its simple architecture. Performance of the PAM4 systems is limited for high dispersion values or demands complicated signal processing for further increase in data rates. A polarization multiplexed carrier based self-homodyne (PMC-SH) link with adaptive polarization control is a practical approach with an laser oscillator (LO)-less and carrier phase recovery (CPR)-free coherent receiver that can replace PAM4 links for achieving high data rates. We analytically find that PMC-SH scheme results in a significantly better BER for a given transmission rate or can achieve doubling of the data rate for given bandwidth of electronics and laser power (when compared with PAM4). Practical implementation of the proposed system with adaptive polarization control is also discussed. Presented theoretical frame work highlights the advantages of such self-homodyne systems over PAM4 based systems in terms of SNR requirements and capacity.

High-Capacity Coherent DCIs using PolMuxed Carrier and LO-Less Receiver

Coherent techniques are expected to be used to meet the demand for higher data rates in short-reach optical links in the near future. Digital coherent receivers used for long haul applications are not suitable for short-reach links because of excessive power dissipation, size, and cost. The power consumption, size, and cost of the receiver can be drastically reduced by processing signals in the analog domain itself. A 100 Gb/s dual-polarization quadrature phase-shift keying receiver that uses analog domain signal processing is presented. The receiver, designed in 130-nm BiCMOS technology, consumes 3.5 W of power. Simulations show bit error rates of less than $10^{-3}$ in the presence of dispersion up to 160 ps/nm, laser linewidths of up to 200 kHz, and a frequency offset of 100 MHz between the transmitter and the receiver lasers.

Analog Domain Signal Processing-Based Low-Power 100-Gb/s DP-QPSK Receiver

Several terabytes of data get generated and transferred through the Internet everyday. With bandwidth-intensive on-line applications such as video, music, and voice the demand for higher data rate increases. The ever-increasing data rate demand will be supported by multilevel signaling over fiber-optic links in the backplane. Traditional coherent optical links use the power hungry ADC+DSP approach at the receiver side for mitigating the distortions caused by the system non-idealities. A significant amount of power consumption can be reduced if the received signals are processed in the analog domain itself. This paper presents a 12.5GBd 16-QAM analog processing-based coherent receiver, that has been designed and simulated using 130nm BiCMOS technology. The receiver uses radius directed equalization and Costas loop based carrier phase recovery and compensation. Simulations indicate that the receiver is capable of mitigating a dispersion of up to 160 ps/nm and a frequency offset of up to 10 MHz. For a transmission over 10 km-long fiber the receiver gives an output error vector magnitude of 23.2% when the laser linewidth is 200 kHz. The receiver is projected to consume ∼3.5W of power.

Atishay Sharma

Papers

Analog Domain Signal Processing-Based Low-Power 100-Gb/s DP-QPSK Receiver

Analog processing-based coherent optical receiver for 16-QAM signals with 12.5 GBd baud rate