More than a decade of research in the field of thermal, motion, vibration and electromagnetic radiation energy harvesting has yielded increasing power output and smaller embodiments. Power management circuits for rectification and DC–DC conversion are becoming able to efficiently convert the power from these energy harvesters. This paper summarizes recent energy harvesting results and their power management circuits.

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Micropower energy harvesting

More than a decade of research in the field of thermal, motion, vibration and electromagnetic radiation energy harvesting has yielded increasing power output and smaller embodiments. Power management circuits for rectification and DC-DC conversion are becoming able to efficiently convert the power from these energy harvesters. This paper summarizes recent energy harvesting results and their power management circuits.

Wireless sensor nodes (WSNs) are employed today in many different application areas, ranging from health and lifestyle to automotive, smart building, predictive maintenance (e.g., of machines and infrastructure), and active RFID tags. Currently these devices have limited lifetimes, however, since they require significant operating power. The typical power requirements of some current portable devices, including a body sensor network, are shown in Figure 1.

Energy Harvesting for Autonomous Wireless Sensor Networks

A software-defined radio (SDR) receiver with baseband programmable RF bandpass filter (BPF) and complex impedance match is presented. The passive mixer-first architecture used here allows the impedance characteristics of the receiver's baseband circuits to be translated to the RF port of the receiver. Tuning the resistance at the baseband port allows for a real impedance match to the antenna. The addition of "complex feedback" between I and Q paths allows for matching to the imaginary component of the antenna impedance. By implementing both real and imaginary components with resistors in feedback around low noise baseband amplifiers, noise figure is also kept low. Tunable sampling capacitors on the baseband side of the passive mixer translate to tunable-Q filters on the RF port which allow for very good out-of-band linearity. Furthermore, the concept of in-band and out-of-band must be redefined as the impedance match and BPF center frequency move with the LO frequency, such that matching and filtering track the receive frequency. Additionally, 8-phase mixing is shown to provide significant benefits such as impedance matching range, rejection of blockers at LO harmonics, and lower noise figure (NF). Measurements from the receiver implemented in 65 nm CMOS show 70 dB of gain, NF as low as 3 dB, and 25 dBm out-of-band IIP3. Furthermore, tunable impedance matching shows that S11 <;- 30 dB can be achieved at any receive frequency from 0.1-1.3 GHz.

A Passive Mixer-First Receiver With Digitally Controlled and Widely Tunable RF Interface

A differential single-port switched-RC N-path filter with band-pass characteristic is proposed. The switching frequency defines the center frequency, while the RC-time and duty cycle of the clock define the bandwidth. This allows for high-Q highly tunable filters which can for instance be useful for cognitive radio. Using a linear periodically time-variant (LPTV) model, exact expressions for the filter transfer function are derived. The behavior of the circuit including non-idealities such as maximum rejection, spectral aliasing, noise and effects due to mismatch in the paths is modeled and verified via measurements. A simple RLC equivalent circuit is provided, modeling bandwidth, quality factor and insertion loss of the filter. A 4-path architecture is realized in 65 nm CMOS. An off-chip transformer acts as a balun, improves filter-Q and realizes impedance matching. The differential architecture reduces clock-leakage and suppresses selectivity around even harmonics of the clock. The filter has a constant -3 dB bandwidth of 35 MHz and can be tuned from 100 MHz up to 1 GHz. Over the whole band, IIP3 is better than 14 dBm, P1dB=2 dBm and the noise figure is 3-5 dB, while the power dissipation increases from 2 mW to 16 mW (only clocking power).

/pdf/tunable-high-q-n-path-band-pass-filters-modeling-and-1qbn6swnit.pdf

Tunable High-Q N-Path Band-Pass Filters: Modeling and Verification

An ultra low power 2.4-GHz transceiver targeting wireless sensor network applications is presented. The receiver front-end is fully passive, utilizing an integrated resonant matching network to achieve voltage gain and interface directly to a passive mixer. The receiver achieves a 7-dB noise figure and -7.5-dBm IIP3 while consuming 330 muW from a 400-mV supply. The binary FSK transmitter delivers 300 muW to a balanced 50-Omega load with 30% overall efficiency and 45% power amplifier (PA) efficiency. Performance of the receiver topology is analyzed and simple expressions for the gain and noise figure of both the passive mixer and matching network are derived. An analysis of passive mixer input impedance reveals the potential to reject interferers at the mixer input with characteristics similar to an extremely high-Q parallel LC filter centered at the switching frequency

Low-Power 2.4-GHz Transceiver With Passive RX Front-End and 400-mV Supply

Wireless sensor nodes are autonomous devices incorporating sensing, power, computation, and communication into one system. Applications for large scale networks of these nodes are presented in the context of their impact on the hardware design. The demand for low unit cost and multiyear lifetimes, combined with progress in CMOS and MEMS processing, are driving development of SoC solutions for sensor nodes at the cubic centimeter scale with a minimum number of off-chip components. Here, the feasibility of a complete, cubic millimeter scale, single-chip sensor node is explored by examining practical limits on process integration and energetic cost of short-range RF communication. Autonomous cubic millimeter nodes appear within reach, but process complexity and substantial sacrifices in performance involved with a true single-chip solution establish a tradeoff between integration and assembly.

SoC Issues for RF Smart Dust

A 900 MHz, ultra-low power RF transceiver is presented for wireless sensor networks. It radiates -6 dBm in transmit mode and has a receive sensitivity of -94 dBm while consuming less than 1.3 mW in either mode from a 3 volt battery. Two of these transceivers have been demonstrated communicating over 16 meters through walls at a bit rate of 20 kbps while using only 4 off-chip components.

An ultra-low power 900 MHz RF transceiver for wireless sensor networks

A 2.4GHz RF transceiver in 130nm CMOS for sensor networks is presented. The transceiver operates from 400mV to accommodate a single solar cell power supply. The RX dissipates 200 to 750muW and achieves a 6.7dB NF and a -6.2dBm IIP3 at 330muW. At 300muW output power, the PA is 44% efficient and the overall TX is 30% efficient

An Ultra-Low Power 2.4GHz RF Transceiver for Wireless Sensor Networks in 0.13/spl mu/m CMOS with 400mV Supply and an Integrated Passive RX Front-End

The design of RF circuits for short-range, low-power wireless communication is discussed. A derivation of optimum link range and transceiver power budget is presented based on simple models for indoor path loss and power vs. performance tradeoffs in a generic transceiver. Design techniques aimed at efficiently reaching these parameters are discussed for individual circuit blocks. Finally, some published transceivers are discussed with respect to the optimization and design techniques presented.

B.W. Cook

Papers

Low-Power 2.4-GHz Transceiver With Passive RX Front-End and 400-mV Supply

SoC Issues for RF Smart Dust

An ultra-low power 900 MHz RF transceiver for wireless sensor networks

An Ultra-Low Power 2.4GHz RF Transceiver for Wireless Sensor Networks in 0.13/spl mu/m CMOS with 400mV Supply and an Integrated Passive RX Front-End

Low power RF design for sensor networks