UART (Universal Asynchronous Receiver Transmitter) is a kind of serial communication protocol; mostly used for short-distance, low speed, low-cost data exchange between computer and peripherals. During the actual industrial production, sometimes we do not need the full functionality of UART, but simply integrate its core part. UART includes three kernel modules which are the baud rate generator, receiver and transmitter. The UART implemented with VHDL language can be integrated into the FPGA to achieve compact, stable and reliable data transmission. It's significant for the design of SOC. The simulation results with Quartus II are completely consistent with the UART protocol.

Design and Simulation of UART Serial Communication Module Based on VHDL

Green communication is the latest research trend practiced by researcher in green computing and network communication. There is no extensive work in green network design and no work in thermal aware network equipment design. In order to fill this research gap, we are going to design thermal aware energy efficient Universal Asynchronous Receiver Transmitter (UART) that will create an avenue for thermal aware green communication. We had achieved 59.32% to 72.96% reduction when temperature varies from 15°C to 75°C and airflow is 250 Linear Feet Per Minute (LFM), and reduction is in range of 59.30% to 72.97%, when temperature varies from 15°C to 75°C and airflow is 500 LFM. This design is implemented on Virtex 6 Field programmable Gate Array (FPGA) using Verilog.

Thermal Aware Low Power Universal Asynchronous Receiver Transmitter Design on FPGA

A new fault coverage test pattern generator using a linear feedback shift register (LFSR) called FC-LFSR can perform fault analysis and reduce the power of a circuit during test by generating three intermediate patterns between the random patterns by reducing the hardware utilization. The goal of having intermediate patterns is to reduce the transitional activities of Primary Inputs (PI) which eventually reduces the switching activities inside the Circuit under Test (CUT) and hence power consumption is also reduced without any penalty in the hardware resources. The experimental results for uart benchmark, with and without fault confirm the fault coverage of the circuit being tested.

Implementation of UART with BIST Technique in FPGA

In this paper, we designed and implemented IoT sensors based badminton motion analysis and training system that can be readily used by badminton players with PC. Unlike the traditional badminton training system which uses signals of the flags by coach, the proposed electronic training system used IoT sensors to automatically detect and analysis the motions for badminton players. The proposed badminton motion analysis and training system has the advantage with low power, because it communicates with the program through BLE communication. The badminton motion analysis system automatically measures the training time according to the player`s movement, so it is possible to collect objective result data with less errors than the conventional flag signal based method by coach. In this paper, training data of 5 athletes were collected and it provides the feedback function through the visualization of each section of the training results by the players which can enable the effective training. For the weakness section of each player, the coach and the player can selectively and repeatedly perform the training function with the proposed training system. Based on this, it is possible to perform the repeated training on weakness sections and they can improve the response speed for these sections. Continuous research is expected to be able to compare more various players` agility and physical fitness.

Implementation of Badminton Motion Analysis and Training System based on IoT Sensors

Green communication is the latest research trend practiced by researcher in green computing and network communication. There is no extensive work in green UART design. In order to fill this research gap, we are going to design LVCMOS based energy efficient Universal Asynchronous Receiver Transmitter (UART) that will create an avenue for IO standards based green communication. UART (Universal Asynchronous Receiver Transmitter) is a kind of serial communication protocol; mostly used for short-distance low speed, low-cost data exchange between computer and peripherals. Various energy efficient techniques have been applied to the design along with the change in IO standards. It has been concluded that there occurs 97.65% reduction in clock power, 75.14% reduction in I/O power, 7.19% reduction in leakage power, 17.37% reduction in junction temperature, and 71.12% reduction in total power dissipation in case SSTL2_II IO/standard, thus it is considered to be most energy and power efficient IO standard to be used in the future.

Thermally Aware LVCMOS based Low Power Universal Asynchronous Receiver Transmitter Design on FPGA

The protocol of the UART,a full-duplex data transmission protocol,is widely used in data communication and control systemsIn the industry,it dose not use all the functions of the UART but the coreThere are three kernel functional modules in UART which consists of baud rate generator,receiver and transmitterBy using the Verilog-HDL to describe the three kernel functional modules of the UART,making them as a whole and simulating them with the Modelsim,the results of the simulation are completely consistent with the UART protocol

Bai Feng-e

Papers

Design and Simulation of UART Serial Communication Module Based on Verilog-HDL