Windows Azure被认为是Windows NT之后的16年来微软最重要的产品,微软计划将80%的资源和研发力量投入到云计算项目中。这种俨然押上未来的豪赌,是IT业的新潮流迫使微软做出了妥协,还是微软主动寻求新的霸主地位而酝酿的云计算新变革？

Windows Azure：微软押上未来

This paper investigates the viability of deploying SRAM-based FPGAs into harsh Earth-orbit environments. A reliability model is presented for estimating the MTTF of SRAM FPGA designs in specific orbits and orbit conditions. The model requires orbit- and condition-specific SEU rates and design-specific estimates of the probability of failure during a single scrubbing period. Probability of failure estimates are reported for several FPGA designs from both fault-injection and accelerator experiments. The model also includes a method for estimating composite mean time to failure (MTTF) that incorporates all orbit conditions over a solar cycle. Despite using pessimistic assumptions, the results from this model suggest that SRAM FPGA designs protected by TMR and scrubbing operate very reliably in a LEO orbit and surprisingly well in ?harsh? orbits.

SRAM FPGA Reliability Analysis for Harsh Radiation Environments

Dynamic and partial reconfiguration are key differentiating capabilities of field programmable gate arrays (FPGAs). While they have been studied extensively in academic literature, they find limited use in deployed systems. We review FPGA reconfiguration, looking at architectures built for the purpose, and the properties of modern commercial architectures. We then investigate design flows and identify the key challenges in making reconfigurable FPGA systems easier to design. Finally, we look at applications where reconfiguration has found use, as well as proposing new areas where this capability places FPGAs in a unique position for adoption.

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FPGA Dynamic and Partial Reconfiguration: A Survey of Architectures, Methods, and Applications

The use of static random access memory (SRAM)-based field programmable gate arrays (FPGAs) in harsh radiation environments has grown in recent years. These types of programmable devices require special mitigation techniques targeting the configuration memory, the user logic, and the embedded RAM blocks. This article provides a comprehensive survey of the literature published in this rich research field during the past 10 years. Furthermore, it can also serve as a tutorial for space engineers, scientists, and decision makers who need an introduction to this topic.

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Mitigation of Radiation Effects in SRAM-Based FPGAs for Space Applications

Fault tolerant system design and SEU injection based testing

SRAM-based FPGA devices are susceptible to single event effects (SEE) including single event upsets (SEU) within the configuration memory. Configuration scrubbing along with TMR or other hardware redundancy techniques are often used to mitigate the effects of these SEUs. However, the use of traditional configuration scrubbing prevents the ability to reconfigure the FPGA dynamically or to perform partial reconfiguration. This paper presents a novel technique that allows partial reconfiguration to be used with configuration scrubbing. A self scrubber, utilizing a small portion of the FPGA, performs the necessary operations to reconfigure a portion of the design while continuously scrubbing the entire FPGA.

FPGA partial reconfiguration via configuration scrubbing

As FPGA logic density continues to increase, new techniques are needed to store initial configuration data efficiently, maintain usability, and minimize cost. In this paper, a novel compression technique is presented for Xilinx Virtex partially reconfigurable FPGAs. This technique relies on constrained hardware design and layout combined with a few simple compression techniques. This technique uses partial reconfiguration to separate a hardware design into two separate regions: a static and partial region. A bitstream containing only the static region is then compressed by removing empty frames. This bitstream will be stored in non-volatile memory and used for initialization. The remaining logic is configured through partial reconfiguration over a communication network. By applying this technique, a high level of compression was achieved (almost 90% for the V4 LX25). This compression technique requires no extra decompression circuitry and compression levels improve as device size increases.

Bitstream compression through frame removal and partial reconfiguration

A prototype system for interactive television news is described. It supports the full production cycle for interactive news, including assembly of clips into stories and stories into newscasts. A variety of interactive techniques are offered to the viewer. These include expressing likes and dislikes of headlines, skipping out of stories, requesting additional content and selection of stories from a menu. This system was deployed into homes for two weeks using fresh television content. User control events were logged and evaluated to understand interactive viewing behavior.

Benjamin Sellers

Papers

FPGA partial reconfiguration via configuration scrubbing

Bitstream compression through frame removal and partial reconfiguration

Enhancing interactive television news