Showing papers by "Bulent Abali published in 2000"

Method for operating system support for memory compression

Abstract: In a system with hardware main memory compression, the method of this invention monitors the physical memory utilization and if physical memory is near exhaustion it forces memory to be paged out, thus freeing up real memory pages. These pages are then zeroed, thus they are highly compressible and therefore reduce the physical memory utilization. Pages that have been forced out due to high physical memory utilization are not made available for allocation. In systems where operating system changes are permitted, this invention dynamically controls the minimum size of the free page pool and zeros pages upon freeing. When the physical memory utilization falls below a critical threshold the mechanism reduces the minimum size of the free pool to allow further allocation. In systems where operating system changes are not possible, pages are allocated by a module (e.g. Device driver) and then zeroed. When the physical memory utilization falls below a critical threshold this method frees some of the explicitly set aside pages.

Efficient virtual interface architecture (VIA) support for the IBM SP switch-connected NT clusters

Abstract: The IBM SP Switch-Connected NT cluster is one the newest clustering platforms available. In this paper, we discuss an experimental implementation of the Virtual Interface Architecture for this platform. We discuss different design issues involved in this implementation. In particular, we explain how the virtual-to-physical address translation can be implemented efficiently with a minimum Network Interface Card (NIC) memory requirement. We show how caching the VIA descriptors on the NIC can reduce the communication latency. We also present an efficient scheme for implementing the VIA door bells without any hardware support. A comprehensive performance evaluation study of the implementation is provided. The performance of the implemented VIA surpasses that of other existing software implementations of the VIA and is comparable to that of a hardware VIA implementation. The peak measured bandwidth for our system is observed to be 101.4 MBytes/s and the one-way latency for short messages is 18.2 microseconds. It is to be noted that the VIA implementation presented in this paper is not a part of any IBM product and no assumptions should be made regarding its availability as a product in the future.

Comparison and Evaluation of Design Choices for Implementing the Virtual Interface Architecture (VIA)

Abstract: The Virtual Interface Architecture (VIA) specification has been developed to standardize user-level network interfaces that provide low latency, high bandwidth communications Few hardware and software implementations of VIA exist Since the VIA specification is flexible, different choices exist for implementing various components of VIA such as doorbells, address translation methods, and completion queues Although previous studies have evaluated the overall performance of different VIA implementations, there has not been a comparative study on the performance of VIA components In this paper, we evaluate and compare the performance of different implementations of essential VIA components We discuss the pros and cons of each design approach and describe the required support for implementing each of them As a user application, we use the NAS Parallel Benchmarks to study the effect of caching the address translation tables on the NIC and to study design issues involved in implementing completion queues As a hardware platform we use the IBM Netfinity SP cluster running the NT 40 operating system and a Myrinet connected cluster of PCs running the Linux operating system

Operating System Support for Fast Hardware Compression of Main Memory Contents

Abstract: A novel computer system hardware has been built for compressing main memory contents. This presents to the operating systems an expanded real memory larger than the physically available memory. Two to one or better compression ratio has been observed for most applications. As the compression ratio of applications dynamically changes so does the real memory size that is managed by the OS. In this paper, we describe and evaluate the operating system techniques developed for compressed memory systems that can deal with such dynamically changing memory size conditions.

Device and method for stabilizing image

Abstract: PROBLEM TO BE SOLVED: To provide a method for compensating the vibration and jitter of image while making a user observable the image on a display screen by compensating the movement of a display device so that the image on a display screen of the display device is practically stopped in relation to the close observation by an observer. SOLUTION: A system for stabilizing image and for correcting jitter/vibration of image includes a movement sensing circuit 42, a horizontal signal circuit 50H and a vertical signal circuit 50V for respectively receiving the output from the movement sensing circuit 42. The output from the movement sensing circuit 42 expressing the horizontal offset and the vertical offset is applied to the horizontal signal circuit 50H and the vertical signal circuit 50V in order to move an image to be displayed in the vertical direction and the horizontal direction. Furthermore, the horizontal signal circuit 50H and the vertical signal circuit 50V receive the input for expressing the processed video image signal at the main input terminal.

Adaptive routing in RS/6000 SP-like bidirectional multistage interconnection networks

Abstract: The IBM RS/6000 SP is one of the most successful commercially available multicomputers. SP owes its success partially to the scalable, high bandwidth, low latency network. In this paper, we present the adaptive routing scheme used in the new SP network switch chip called the Switch2. We show that the adaptive routing methods outperform the oblivious routing methods on SP like multistage networks. It is shown that the adaptive routing increases the network throughout by up to 229% over oblivious routing in some cases. We also study the effect of output selection, functions on the network performance. We present six different output selection functions and study their performance for different system parameters and communication patterns through extensive simulation. The results show that three of these selection functions perform similar to each other and outperform the other selection functions consistently. Therefore, unlike previous research findings for meshes and tori, there is no need to use multiple (or hybrid) selection functions to obtain the best performance for the SP like bidirectional multistage interconnection networks. We also provide an analysis of the cost-effectiveness of different selection functions with respect to the complexity of their hardware implementations.

Image stabilization device for display unit has motion compensation circuit functionally connected to motion sensor to compensate for movements of display unit so image remains static

Abstract: The device has a measurement sensor (41H,41V) for measuring movement of the display unit (100) and a motion compensation circuit that is functionally connected to the sensor to compensate for the movements of the display unit so that the image remains essentially stationary on the screen of the display unit in relation to an observer. An Independent claim is also included for a method of image stabilization in a display unit.