Learn the basic properties and designs of modern VLSI devices, as well as the factors affecting performance, with this thoroughly updated second edition. The first edition has been widely adopted as a standard textbook in microelectronics in many major US universities and worldwide. The internationally-renowned authors highlight the intricate interdependencies and subtle tradeoffs between various practically important device parameters, and also provide an in-depth discussion of device scaling and scaling limits of CMOS and bipolar devices. Equations and parameters provided are checked continuously against the reality of silicon data, making the book equally useful in practical transistor design and in the classroom. Every chapter has been updated to include the latest developments, such as MOSFET scale length theory, high-field transport model, and SiGe-base bipolar devices.

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Fundamentals of Modern VLSI Devices

Silicides and ohmic contacts

Tunneling currents in reverse-biased base-emitter junctions are investigated and analyzed. Guided by a simple analytic theory, shallow n+-p junctions are designed with a variety of different concentration profiles. Measurements of the dc electrical characteristics indicate a significant Zener tunneling component in the reverse diode current. The appearance of tunneling is ascertained by the temperature dependence, which also allows a clear distinction of other current mechanisms. The sensitivity of the current to the details of the doping profile is theoretically explained in terms of the maximum electric field in the junction and verified by SIMS and C-V profiling techniques. The C-V data are analyzed in a novel way to obtain experimental data on the maximum electric field making the conclusions valid for any arbitrary junction. The implications of the presence of high electric fields in shallow junctions are discussed with respect to scaling bipolar transistors.

Tunneling in base-emitter junctions

Experimental evidence of a new type of threshold instability in IGFET’s due to the emission of leakage electrons from the silicon substrate into SiO2 is presented. Also presented is a model relating the emission current to the leakage current components of the device. This emission phenomenon could be a serious threshold instability problem at high operating temperatures where the leakage current level is high, especially in devices with a dual dielectric as the gate insulator where the electron trap concentration is very high.

Threshold instability in IGFET’s due to emission of leakage electrons from silicon substrate into silicon dioxide

A low-noise n+np germanium avalanche photodiode which successfully operates in the wavelength region of 0.8-1.5 \mu m has been designed, fabricated, and tested. Low-excess noise factor F \sim 7 is experimentally obtained at a multiplication factor of M \sim 10 and at a wavelength \lambda \sim 1.3 \mu m, whereas the calculated one is 7.6. Quantum efficiency is as high as 80 percent and a cutoff frequency (-3 dB) is 500 MHz at M \sim 10 and \lambda \sim 1.3 \mu m. Overall performance of an n+np Ge-APD fabricated is estimated at \lambda = 1.3 \mu m, and compared with that of a III-V alloy APD (InGaAs-InP) by calculating minimum detectable power. An n+np Ge-APD has shown minimum detectable power only 1.7 dB larger than that of a III-V APD at a signal-to-noise ratio of 22 dB and at a bandwidth of 100 MHz. An n+np Ge-APD also shows low-multiplication noise and considerably low minimum detectable power in the 0.8 μm region. Breakdown voltage of an n+np Ge-APD is 31 V and is much lower than that of a Si-APD. The n+np Ge-APD is found to be a useful detector in the whole wavelength region 0.8-1.5 \mu m of optical communication systems.

A low-noise n + np germanium avalanche photodiode

Phosphorous diffused and arsenic ion‐implanted p‐n junctions have been prepared in 0.5‐ and 2‐Ω cm p‐type 〈100〉 Si wafers. Leakage currents have been measured on gated diode structures of various geometries as a function of bias voltage and temperature. From these measurements the relative importance of the surface, depletion layer, and bulk carrier generation to junction leakage have been determined. The leakage current levels measured on the ion‐implanted junctions are comparable to those measured on the diffused junctions. The surface generation leakage component is the largest, ranging from 5×10−15–10−13 A/mil2 at 25 °C. This sufficiently large to dominate the leakage current for junctions with areas less than approximately 103 mil2. The depletion‐layer generation current IDB is much smaller than would be expected. It is only comparable to the diffusion current at 25 °C where IDB?IDIFF?10−16 A/mil2 for defect‐free junctions. IDIFF becomes the largest for large‐area diodes or for junctions of any area ...

C. J. Kircher

Papers

Comparison of leakage currents in ion‐implanted and diffused p‐n junctions