Damascene copper electroplating for on-chip interconnections, a process that we conceived and developed in the early 1990s, makes it possible to fill submicron trenches and vias with copper without creating a void or a seam and has thus proven superior to other technologies of copper deposition. We discuss here the relationship of additives in the plating bath to superfilling, the phenomenon that results in superconformal coverage, and we present a numerical model which accounts for the experimentally observed profile evolution of the plated metal.

Damascene copper electroplating for chip interconnections

Today, the price of building a factory to produce submicron size electronic devices on 300 mm Si wafers is over billions of dollars. In processing a 300 mm Si wafer, over half of the production cost comes from fabricating the very-large-scale-integration of the interconnect metallization. The most serious and persistent reliability problem in interconnect metallization is electromigration. In the past 40 years, the microelectronic industry has used Al as the on-chip conductor. Due to miniaturization, however, a better conductor is needed in terms of resistance–capacitance delay, electromigration resistance, and cost of production. The industry has turned to Cu as the on-chip conductor, so the question of electromigration in Cu metallization must be examined. On the basis of what we have learned from the use of Al in devices, we review here what is current with respect to electromigration in Cu. In addition, the system of interconnects on an advanced device includes flip chip solder joints, which now tend ...

Recent advances on electromigration in very-large-scale-integration of interconnects

Electromigration studies on Cu interconnects are reviewed. Some history and more recent results are discussed along with a description of the present interpretations of the active mass transport mechanisms involved in Cu electromigration. The issue of the dual-damascene process and its potential effect on EM reliability is described with special focus on the peculiarities of the dual-damascene interconnect architecture compared to more conventional subtractively etched Al-based interconnects. Experiments performed on dual-damascene interconnects that highlight electromigration reliability issues such as early failure, a tentative explanation for via electromigration failure, and the Blech effect, are summarized. Emphasis is placed on an experimental methodology that uses large interconnect ensembles in a multi-link configuration. Such a large scale study of nearly 10000 interconnects has shown statistical evidence of bimodal failure behavior consistent with the presence of a weak and strong failure mode, which have been identified as voiding, respectively, within the via and the trench at the cathode end of an interconnect. A multi-link approach has also demonstrated a length-dependent distribution of failures that yields a (j/spl middot/L)/sub c/ product value of about 9000 A/cm in dual-damascene Cu/oxide interconnections and is consistent with mass transport that is controlled by the presence of extended defects within Cu such as grain boundaries, interfaces, and/or surfaces. The study of dual-damascene Cu has demonstrated the importance of statistics in analyzing EM reliability.

Electromigration reliability issues in dual-damascene Cu interconnections

Stress-induced voiding is observed in Cu-based, deep-submicron, dual-damascene technologies where voids are formed under the via when the via connects to a wide metal lead below it. The voiding results from the supersaturation of vacancies that develops due to grain growth when the Cu is not properly annealed prior to being fully constrained. The driving force for voiding is shown to be stress migration with a maximum in voiding rate observed at /spl sim/190/spl deg/C. A diffusional model is presented which shows that the voiding mechanism is an issue primarily for vias connected to wide Cu leads. A thermomechanical stress exponent of 3.2 and a diffusional activation energy of 0.74 eV were determined for this stress-induced voiding mechanism.

Stress-induced voiding under vias connected to wide Cu metal leads

The impact of 11 alloying elements, namely, Mg, Ti, In, Sn, Al, Ag, Co, Nb, and B, at two nominal concentrations of 1 and 3 at. %, and Ir and W, at only a nominal concentration of 3 at. %, on the resistivity and grain structure of copper was investigated. The films were electron beam evaporated onto thermally oxidized Si wafers and had thicknesses in the range of 420–560 nm. Pure evaporated Cu films were used as controls. Isothermal anneals were carried out at 400 °C for 5 h; constant-heating rate treatments, with no hold at the temperature, were done at 3 °C to 650 and 950 °C. In all cases, annealing resulted in the lowering of resistivity compared with the as-deposited state. Furthermore, annealing to a higher temperature resulted in lower, postannealing, room-temperature resistivity, unless the film agglomerated or showed evidence of solute redissolution. Annealing also resulted in significant growth of grains, except for the Nb- and W-containing films. In addition, the grain sizes for the nominally 3 ...

Annealing behavior of Cu and dilute Cu-alloy films: Precipitation, grain growth, and resistivity

The transition from sputtered Al to electroplated Cu interconnects for future microelectronic devices has led to an interest in understanding the relationships between the microstructure and texture of Cu that might impact electrical performance, similar to what has been done for Al. Electroplated Cu undergoes a recrystallization at room temperature that is related to the presence of organic and inorganic additives in the plating bath. As plated, the Cu grains are small (approx. 0.1 μm) and equiaxed, but over a period of hours to days, recrystallization results in grains several microns in size. We observe a significant weakening of the strong as-plated (111) texture by x-ray diffraction pole figure measurements and an increase in the level of randomness. We propose that multiple twinning is the leading mechanism for this phenomenon.

C. Lingk

Papers

Texture development of blanket electroplated copper films